參數(shù)資料
型號(hào)： PPXY8300A6T1
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： Pressure Sensor
英文描述： DIFFERENTIAL, PEIZORESISTIVE PRESSURE SENSOR, RECTANGULAR, SURFACE MOUNT
封裝： SOIC-20
文件頁數(shù)： 152/162頁
文件大?。?/td> 4316K
代理商： PPXY8300A6T1
MPXY8300 Series
Sensors
Freescale Semiconductor
9
2.3.8
PTA0:1 Pins
The PTA0:1 pins can be used by the LF receiver (LFR) as a differential input channel for sensing low level signals from an external
low frequency (LF) coil. The external LF coil should be connected between the PTA0 and the PTA1 pins. Signaling into the LFR
pins can place the device into various diagnostic or operational modes. The LFR is comprised of the detector and the decoder.
These two pins can also be configured as normal bi-directional I/O pins with a programmable pull-up device, but each will always
have a pull-down resistor connected to VSS of approximately 500 kohm.
2.3.9
PTA2:3 Pins
The PTA2:3 pins are general purpose I/O pins. These two pins can be configured as normal bi-directional I/O pins with
programmable pull-up or pull-down devices and/or wake-up interrupt capability; or they can be connected to the two input
channels of the Timer Pulse Width (TPM1) module.
2.3.10
PTA5:6 Pins
The PTA5:6 pins are general purpose I/O pins. These two pins can also be configured with programmable pull-up or pull-down
devices and/or wake-up interrupt capability.
2.3.11
BKGD Pin
The BKGD pin is used to place the device in the background debug mode (BDM) to evaluate MCU code and to also transfer data
to/from the internal memories as described in Section 3.3. If the BKGD pin is held low when the device comes out of reset the
device will go into the active background debug mode (BDM). The active background debug mode can also be activated by
specific toggling of the BKGD pin while the device is powered up if the MCU is not in a stop mode.
The BKGD pin has an internal pull-up device, but should be connected to VDD in the application unless there is a need to enter
BDM operation after the device as been soldered into a PWB. If in-circuit BDM is desired the BKGD pin should be connected to
VDD through a low impedance resistor (<10 kΩ) which can be overdriven by an external signal. This low impedance resistor
reduces the possibility of getting into the debug mode in the application due to an EMC event.
2.3.12
RESET Pin
The RESET pin is used for test and establishing the BDM condition.
This pin has an internal pull-up device, but should be connected to VDD in the application unless there is a need to enter BDM
operation after the device as been soldered to the PWB. If in-circuit BDM is desired the RESET pin should be connected to VDD
through a low impedance resistor (<10 k
Ω) which can be overdriven by an external signal. This low impedance resistor reduces
the possibility of getting into the debug mode in the application due to an EMC event.
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