TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Data Sheet
June 2002
108
Agere Systems Inc.
8 TMUX Registers
(continued)
Table 118. TMUX_THS_POH[1—3]_CTL, Transmit High-Speed Control Parameters (R/W)
(continued)
Address
Bit
Name
Function
Reset
Default
0
0x40036
1
TMUX_THSC2INS1
Transmit C2 Insert (Control) for Port 1.
Control bit, when
set to a logic 1, inserts the value in TMUX_TC2INS1[7:0]
(
Table 124 on page 112
) into the outgoing C2 byte in the
STS-3/STM-1 (AU-4) frame; a logic 0 allows insertion from the
TPOAC channel or a default value. Only port 1 control is valid
in AU-4 mode.
Transmit J1 Insert (Control) for Port 1.
Control bit, when set
to a logic 1, inserts the 64-byte sequence
TMUX_TJ1DINS1[64—1][7:0] (
Table 150 on page 125
) into
the outgoing STS-3/STM-1 (AU-4) frame; a logic 0 allows
insertion from the TPOAC channel or a default value. Only
port 1 control is valid in AU-4 mode.
Reserved.
TMUX_THSPREIINH2
Transmit Path REI Inhibit for Port 2.
Control bit, when set to
a logic 1, disables hardware insertion of path REI (B3 errors)
in the outgoing STS-3/STM-1 (AU-4) frame G1 byte; a logic 0
enables hardware insertion of path REI. Only port 1 control is
valid in AU-4 mode.
TMUX_TPOHTHRU2
Transmit High-Speed Path Overhead Insertion from Low-
Speed Input (Telecom Bus).
Control bit, when set to a logic
1, causes all path overhead bytes for port 2, and H1, H2 and
H3, to be passed through from the low-speed telecom bus to
the high-speed output signal. Only port 1 control is valid in
AU-4 mode.
TMUX_THSN1INS2
Transmit N1 Insert (Control) for Port 2.
Control bit, when
set to a logic 1, inserts the value in TMUX_TN1INS2[7:0]
(
Table 124 on page 112
) into the outgoing N1 byte in the
STS-3/STM-1 (AU-4) frame; a logic 0 allows insertion from the
TPOAC channel or a default value. Only port 1 control is valid
in AU-4 mode.
TMUX_THSK3INS2
Transmit K3 Insert (Control) for Port 2.
Control bit, when
set to a logic 1, inserts the value in TMUX_TK3INS2[7:0]
(
Table 124 on page 112
) into the outgoing K3 byte in the
STS-3/STM-1 (AU-4) frame; a logic 0 allows insertion from the
TPOAC channel or a default value. Only port 1 control is valid
in AU-4 mode.
TMUX_THSF3INS2
Transmit F3 Insert (Control) for Port 2.
Control bit, when
set to a logic 1, inserts the value in TMUX_TF3INS2[7:0]
(
Table 124 on page 112
)
into the outgoing F3 byte in the STS-
3/STM-1 (AU-4) frame; a logic 0 allows insertion from the
TPOAC channel or a default value. Only port 1 control is valid
in AU-4 mode.
0
TMUX_THSJ1INS1
0
0x40037
15:9
8
RSVD
0
0
7
0
6
0
5
0
4
0