Data Sheet
June 2002
TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
501
Agere Systems Inc.
21 28-Channel Framer Block Functional Description
(continued)
Table 592. Receive Signaling Link Registers 0—31 Expected Data
If the state mode is 4 state or 2 state, then the unused bits will be set to 0.
21.10 Optional Receive Signaling Features Provisioned for Each Link
21.10.1 Support of DS1 Robbed-Bit Stomping
The DS1 robbed-bit positions of voice time slots will be set to 1 in the payload when FRM_R_RXSTOMP in
FRM_RSLR33, (
Table 386 on page 274)
, bit 7 is set to 1. The robbed-bit positions in the payload will be stomped;
however, the signaling will be transmitted untouched by the system interface.
21.10.2 Support of CEPT Time Slot 16 Stomping
Stomping of time slot 16 for CEPT links is enabled in the system interface block.The Supermapper can also be
configured to transmit AIS on the system bus in time slot 16 when the signaling block loses time slot 16 alignment.
The configuration bits related to these two features are located in the FRM_SYSLR2,
Table 431 on page 299
.
When using these features, the signaling codes forwarded to the transmit system bus will continue to reflect the
contents of FRM_RSLR0—FRM_RSLR31,
Table 384 on page 273
.
21.10.3 Support of Signaling Debounce
If programmed to do so, the signaling extracted from the selected source will be debounced. This implies that a
valid signaling code would have to be detected twice before it is updated in FRM_RSLR0—FRM_RSLR31,
Table 384 on page 273
. This feature is enabled by setting FRM_R_SIGDEB in FRM_RSLR33, (
Table 386 on
page 274
), bit 5.
21.10.4 Support of Japanese Handling Groups
If the signaling is transported by the VT mapper within four handling groups compliant to the Japanese standard,
TTC JT G.704, then FRM_R_HGEN in FRM_RSLR33, (
Table 386 on page 274
), bit 4 must be set to 1. The signal-
ing state mode must be set to either 2 state or no-signaling when using handling groups.
If the signaling transported by the VT mapper uses handling groups, then the status of the handling group alignment
can be transmitted across the system interface. The transmission of this status is enabled by setting
FRM_R_TSAISHG in FRM_SGR1, (
Table 371 on page 267)
, bits 15 to 1. This mode forces the signaling data for
the channels contained in each handling group to 1 if HG alignment has not been achieved by the receive signaling
processor. For example, if HG2 is unaligned then the A bit for time slots 2, 6, 10, 14, 18, and 22 forwarded to the sys-
tem would be forced to 1.
21.11 Receive Signaling Global Feature Provisioning
The receive signaling processor requires the provisioning of one global item in order to enable signaling extraction
and delivery.
I
Link count (number of active receive links).
Signaling State Mode
16 state
4 state
2 state
Bit 6
0
0
1
Bit 5
0
1
1
Bit 4
0
0
0
Bit 3
D
0
0
Bit 2
C
0
0
Bit 1
B
B
0
Bit 0
A
A
A