TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Data Sheet
June 2002
244
Agere Systems Inc.
12 28-Channel Framer Registers
(continued)
Table of Contents
(continued)
Tables
Page
Table 386. FRM_RSLR33, Receive Signaling Link Register 33 (R/W) .................................................................274
Table 387. Transmit Path Signaling Register Addressing Map..............................................................................275
Table 388. Transmit Path Signaling Registers Address Indexing..........................................................................275
Table 389. FRM_TSLR0—FRM_TSLR31, Transmit Signaling Link Registers 0—31 (R/W).................................276
Table 390. FRM_TSLR33, Transmit Signaling Link Register 33 (COR)................................................................277
Table 391. FRM_TSLR32, Transmit Signaling Link Register 32 (R/W).................................................................277
Table 392. Performance Monitor Per Link Register Addressing Map....................................................................278
Table 393. Performance Monitor Per Link Register Address Indexing..................................................................279
Table 394. FRM_PMLR1, Performance Monitor Link Register 1 (R/W)................................................................279
Table 395. FRM_PMLR2, Performance Monitor Link Register 2 (R/W)................................................................279
Table 396. FRM_PMLR3, Performance Monitor Link Register 3 (R/W)................................................................280
Table 397. FRM_PMLR4, Performance Monitor Link Register 4 (COR)...............................................................280
Table 398. FRM_PMLR5, Performance Monitor Link Register 5 (COR)...............................................................287
Table 399. FRM_PMLR6, Performance Monitor Link Register 6 (COR)...............................................................289
Table 400. FRM_PMLR7, Performance Monitor Link Register 7 (COR)...............................................................289
Table 401. FRM_PMLR8, Performance Monitor Link Register 8 (COR)...............................................................290
Table 402. FRM_PMLR9, Performance Monitor Link Register 9 (COR)...............................................................290
Table 403. FRM_PMLR10, Performance Monitor Link Register 10 (COR)...........................................................290
Table 404. FRM_PMLR11, Performance Monitor Link Register 11 (COR)............................................................290
Table 405. FRM_PMLR12, Performance Monitor Link Register 12 (COR)...........................................................290
Table 406. FRM_PMLR13, Performance Monitor Link Register 13 (COR)...........................................................291
Table 407. FRM_PMLR14, Performance Monitor Link Register 14 (COR)...........................................................292
Table 408. FRM_PMLR15, Performance Monitor Link Register 15 (COR)...........................................................292
Table 409. FRM_PMLR16, Performance Monitor Link Register 16 (COR)...........................................................292
Table 410. FRM_PMLR17, Performance Monitor Link Register 17 (COR)...........................................................292
Table 411. FRM_PMLR18, Performance Monitor Link Register 18 (COR) ...........................................................292
Table 412. FRM_PMLR19, Performance Monitor Link Register 19 (COR)...........................................................293
Table 413. FRM_PMLR20, Performance Monitor Link Register 20 (COR)...........................................................293
Table 414. Receive Facility Data Link Register Addressing Map ..........................................................................293
Table 415. Receive Path Facility Data Link Registers Address Indexing..............................................................294
Table 416. FRM_RFDLLR1—FRM_RFDLLR5, Receive FDL Link Registers 1—5 (RO)......................................294
Table 417. FRM_RFDLLR6, Receive FDL Link Register 6 (R/W).........................................................................294
Table 418. FRM_RFDLLR7, Receive FDL Link Register 7 (RO)...........................................................................294
Table 419. FRM_RFDLLR8, Receive FDL Link Register 8 (COR)........................................................................295
Table 420. FRM_RFDLLR9, Receive FDL Link Register 9 (R/W).........................................................................295
Table 421. Transmit Facility Data Link Register Addressing Map .........................................................................295
Table 422. Transmit Path Facility Data Link Registers Address Indexing .............................................................295
Table 423. FRM_TFDLLR1—FRM_TFDLR5, Transmit FDL Link Registers 1—5 (COR).....................................295
Table 424. FRM_TFDLLR6, Transmit FDL Link Register 6 (R/W).........................................................................296
Table 425. FRM_TFDLLR7, Transmit FDL Link Register 7 (R/W).........................................................................297
Table 426. FRM_TFDLLR8, Transmit FDL Link Register 8 (RO/COW) ................................................................297
Table 427. FRM_TFDLLR9, Transmit FDL Link Register 9 (R/W).........................................................................297
Table 428. System Interface, Arbiter, and Frame Formatter Link Register Addressing Map.................................298
Table 429. System Interface, Arbiter, and Frame Formatter Link Register Address Indexing...............................298
Table 430. FRM_SYSLR1, System Interface Link Register 1 (R/W).....................................................................299
Table 431. FRM_SYSLR2, System Interface Link Register 2 (R/W).....................................................................299
Table 432. FRM_SYSLR3—FRM_SYSLR6, System Interface Link Registers 3—6 (R/W) ..................................299
Table 433. FRM_ARLR1, Arbiter Link Register 1 (R/W)........................................................................................300
Table 434. FRM_ARLR2, Arbiter Link Register 2 (R/W)........................................................................................301