參數(shù)資料
型號: K4J52324KI-HC1A0
元件分類: DRAM
英文描述: 512M X 1 DDR DRAM, 0.2 ns, PBGA136
封裝: HALOGEN FREE AND ROHS COMPLIANT, FBGA-136
文件頁數(shù): 10/61頁
文件大?。?/td> 1364K
代理商: K4J52324KI-HC1A0
- 18 -
K4J52324KI
datasheet
GDDR3 SGRAM
Rev. 1.2
7.5 Clock Frequency Change Sequence During The Device Operation
Both existing tCK and desired tCK are in DLL-On mode
- Change frequency from existing frequency to desired frequency
- Issue Precharge All Banks command
- Issue MRS command to reset the DLL while other fields are valid and required 20K tCK to lock the DLL
- Issue Precharge All Banks command. Issue at least Auto-Refresh command
Existing tCK is in DLL-on mode while desired tCK is in DLL-off mode
- Issue Precharge All Banks command
- Issue EMRS command to disable the DLL
- Issue Precharge All Banks command
- Change the frequency from existing to desired.
- Issue Auto-Refresh command at least two. Issue MRS command
Clock frequency change in case existing tCK is in DLL-off mode while desired tCK is in DLL-on mode
- Issue Precharge All Banks command and issue EMRS command to disable the DLL.
- Issue Precharge All Banks command.
- Change the clock frequency from existing to desired
- Issue Precharge All Banks command.
- Issue EMRS command to enable the DLL
- Issue MRS command to reset the DLL and required 20K tCK to lock the DLL.
- Issue Precharge All Banks command.
- Issue Auto-Refresh command at least two
NOP
PRE
MRS
PRE
NOP
AR
NOP
tFCHG
tRP
Frequency
Change
All Banks
Precharge
DLL
Reset
tMRD
All Banks
Precharge
20KtCK (DLL locking time)
CK
CMD
EMRS
PRE
NOP
AR
MRS
NOP
tFCHG
Frequency
Change
CK
CMD
tRP
All Banks
Precharge
DLL
OFF
tMRD
All Banks
Precharge
EMRS
PRE
NOP
PRE
EMRS
MRS
PRE
NOP
AR
tFCHG
tRP
Frequency
Change
All Banks
Precharge
DLL
On
tMRD
All Banks
Precharge
20tCK (DLL locking time)
CK
CMD
DLL
Reset
tMRD
tRP
All Banks
Precharge
DLL
OFF
tMRD
All Banks
Precharge
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