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參數(shù)資料
| 型號： | LXT386 |
| 廠商： | Intel Corp. |
| 英文描述： | QUAD T1/E1/J1 Transceiver |
| 中文描述： | 四T1/E1/J1收發(fā)器 |
| 文件頁數(shù)： | 18/78頁 |
| 文件大小： | 500K |
| 代理商： | LXT386 |
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LXT386
—
QUAD T1/E1/J1 Transceiver
18
Datasheet
J14
3
DS/
WR/
SDI/
LEN0
DI
DI
DI
DI
Data Strobe
(Motorola Mode).
Write Enable
(Intel mode).
Serial Data Input
(Serial Mode).
Line Length Equalizer
(Hardware Mode).
Host Mode
This pin acts as data strobe in Motorola mode and as Write Enable in Intel
mode. In serial mode this pin is used as Serial Data Input.
Hardware Mode
This pin determines the shape and amplitude of the transmit pulse. Refer
to
Table 2
.
J13
2
R / W/
RD/
LEN1
DI
DI
DI
Read/Write
(Motorola Mode).
Read Enable
(Intel mode).
Line Length Equalizer
(Hardware Mode).
Host Mode
This pin functions as the read/write signal in Motorola mode and as the
Read Enable in Intel mode.
Hardware Mode
This pin determines the shape and amplitude of the transmit pulse. Refer
to
Table 2
.
J12
82
ALE/
SCLK/
AS/
LEN2
DI
DI
DI
DI
Address Latch Enable
(Host Mode).
Shift Clock
(Serial Mode).
Address Strobe
(Motorola Mode).
Line Length Equalizer
(Hardware Mode).
Host Mode
The address on the multiplexed address/data bus is clocked into the
device with the falling edge of ALE.
In serial Host mode this pin acts as serial shift clock.
In Motorola mode this pin acts a an active Low address strobe.
Hardware Mode
This pin determines the shape and amplitude of the transmit pulse. Refer
to
Table 2
.
Table 1. Pin Assignments and Signal Descriptions
(Continued)
Ball #
PBGA
Pin #
LQFP
Symbol
I/O
1
Description
1. DI: Digital Input; DO: Digital Output; DI/O: Digital Bidirectional Port; AI: Analog Input; AO: Analog Output S: Power Supply;
N.C.: Not Connected.
2. N/C means
“
Not Connected
”
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