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參數(shù)資料
| 型號(hào)： | LXT386 |
| 廠商： | Intel Corp. |
| 英文描述： | QUAD T1/E1/J1 Transceiver |
| 中文描述： | 四T1/E1/J1收發(fā)器 |
| 文件頁(yè)數(shù)： | 22/78頁(yè) |
| 文件大?。?/td> | 500K |
| 代理商： | LXT386 |
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LXT386
—
QUAD T1/E1/J1 Transceiver
22
Datasheet
3.0
Functional Description
Figure 1 is a simplified block diagram of the LXT386. The LXT386 is a fully integrated quad line
interface unit designed for T1 1.544 Mbps and E1 2.048 Mbps short haul applications.
Each transceiver front end interfaces with four lines, one pair for transmit, one pair for receive.
These two lines comprise a digital data loop for full duplex transmission.
The LXT386 can be controlled through hard-wired pins or by a microprocessor through a serial or
parallel interface (Host mode).
The transmitter timing reference is TCLK, and the receiver reference clock is MCLK. The LXT386
is designed to operate without any reference clock when used as an analog front-end (line driver
and data recovery). MCLK is mandatory if the on chip clock recovery capability is used. All four
clock recovery circuits share the same reference clock defined by the MCLK input signal.
3.1
Initialization
During power up, the transceiver remains static until the power supply reaches approximately 60%
of VCC. During power-up, an internal reset sets all registers to their default values and resets the
status and state machines for the LOS.
3.1.1
Reset Operation
In Revision B1, no connect pin 100 was converted to the RESET pin. Only revision B1 requires a
pull up resistor to VCC at pin 100, the pull up resistor is unnecessary for all other revisions. Figure
4 shows the connections needed for revision B1 only. Note: The BGA package does not have a
RESET pin.
There are two methods of resetting the LXT386:
1. Override Reset - Setting the RESET pin low in either hardware mode or host mode. Until the
RESET pin returns high, the LXT386 remains frozen and will not function. Once the RESET
pin has returned high, the LXT386 will operaate normally. Override Reset changes all the
internal registers to their default values.
2. Software Reset - Writing to the RES reset register initiates a 1microsecond reset cycle, except
in Intel non-multiplexed mode. In Intel non-multiplexed mode, the reset cycle takes 2
microseconds. Please refer to Host mode section for more information. This operation
changes all LXT386 registers to their default values.
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