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參數(shù)資料
| 型號(hào)： | PM2329 |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁(yè)數(shù)： | 100/162頁(yè) |
| 文件大?。?/td> | 1581K |
| 代理商： | PM2329 |
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Proprietary and Confidential to PMC-Sierra, Inc and for its Customers
’
Internal Use
Document ID: PMC-2010146, Issue 4
103
PM2329 ClassiPI Network Classification Processor Datasheet
Hard Reset Status
This is a read-only bit. On reading the register, this bit is 1 if a hard reset is in progress. This occurs
immediately after a hardware reset is applied by asserting the RESET* signal. After the RESET* pin is
deasserted, the PM2329 will keep this bit set for eight SCLK cycles until it has completed its internal
initializations. The bit automatically resets to 0 when the internal reset operation is complete. The
external software should check for this bit
’
0
’
before issuing any other accesses to the PM2329.
Enable Multi Channel Mode
Writing
‘
0
’
to this bit causes the PM2329 to act as a single channel device. The Packet Buffer is
configured to work like a single FIFO for multiple incoming packets. The Results Buffer is similarly
also configured to work as a single FIFO for storing the results of multiple packets. Setting this bit to
‘
1
’
causes the PM2329 to work as a multi-channel device, where multiple contexts on the external
processor can control individual channels within the PM2329.
Enable PI Field
If this bit is
‘
1
’
, the PM2329 interprets the first 64 bits that it receives as packet data, as the Packet
Information (PI) field. If this bit is
‘
0
’
the Packet Information is taken from the Packet Information
Register. The PI contains the Packet Attribute as well as fields which inform the FEE in the PM2329
how the header is to be extracted. Setting this bit to
‘
0
’
saves one write cycle during packet transfer but
causes all packet headers to be processed similarly.
Enable OCC Field
If this bit is set to
‘
1
’
, the PM2329 assumes that the OCC is contained within the first 64-bits of packet
data that it receives after the PI Field (if present). If
‘
0
’
then the OC Conductor (OCC) is taken from the
OCC Register. The OCC contains instructions for packet processing in terms of the sequence of OCs to
be executed. Setting this bit to
‘
0
’
saves a write cycle during packet transfer but causes all packets to be
processed in a like manner.
Direction Specifier
There are several mechanisms by which packet direction can be indicated to the PM2329. This bit
specifies to the PM2329 what source it will use to determine the direction sense of the packet as per the
table below.
Table 22
Direction Specifier Bit
Directon
Specifier Bit
0
Packet data from
Packet Source
(DMA)
PI indicates
direction
(Enable PI Field = 1)
PSPD Pin indicates
direction
(Sampled on the last
word [EOP]
transferred)
Packet data from
Processor
PI indicates direction
(Enable PI Field = 0)
Comment
PI controlled
direction
1
Address of Packet
Buffer Input Register
which processor
writes to indicates
direction
(Sampled on the last
word [EOP]
transferred)
Hardware
Controlled direction
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