Proprietary and Confidential to PMC-Sierra, Inc and for its Customers
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Internal Use
Document ID: PMC-2010146, Issue 4
128
PM2329 ClassiPI Network Classification Processor Datasheet
If this field is set to 00h (i.e., all devices are disabled), it signals an invalid OCID and current OC
execution will be skipped and based on the branch code in the current C-Word, the next C-Word will be
fetched and processed.
D-Word Update Control
This field specifies which of the D-Word fields (if defined) need to be updated. The 4 bits are defined as
follows.
Bit 15
Bit 14
Bit 13
Bit 12
Update Byte Count
Update Packet Count
Update Timestamp
Update TCP State
Branch Opcode
This 4 bit field specifies the following opcodes.
0000
0001
Continue
Return
Return address is popped from an internal single-level stack.
Goto Immediate
Call Immediate
Return address is pushed into an internal single-level stack.
Goto immediate address on match, else continue
Call immediate address on match, else continue
Goto immediate address on match else terminate
Call immediate address on match, else terminate
Goto cell number address on match, else continue
Call cell number address on match, else continue
Goto cell number address on match, else terminate
Call cell number address on match, else terminate
Goto cell number address on match, else goto immediate
Call cell number address on match, else call immediate
(Reserved)
Terminate
The cell number address is the relative address of the rule within the OC partition that generated the match.
The address is used as the 17-bit (target) address in the E-RAM.
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Immediate Address
This is an 8-bit field which specifies one of 256 C-Words to branch to using a goto or a call opcode.
Hence, the target for any immediate address must always lie within the first 256 locations of the E-RAM
C-Words.