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| 型號(hào)： | PM2329 |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁(yè)數(shù)： | 113/162頁(yè) |
| 文件大?。?/td> | 1581K |
| 代理商： | PM2329 |
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Proprietary and Confidential to PMC-Sierra, Inc and for its Customers
’
Internal Use
Document ID: PMC-2010146, Issue 4
116
PM2329 ClassiPI Network Classification Processor Datasheet
required assuming FIFO addressing (all writes at the same address, except the EOP word) is to be used.
Note:
For 64-bit mode, the last 32 bits must be left justified (63:32) and the lower 32 bits (31:0) should be
padded with zeroes.
The next table shows the write cycles required when SRAM-like addressing is utilized.
Note that when using the SRAM like addressing to input the packet data (non EOP words), the lower
address bits (SA[7:3], or SA[7:2]) are don
’
t care whereas the EOP word address is fixed depending on the
Direction to be indicated (EOP D0 is Base 3 +0F8h; EOP D1 is Base 0 +08h [64 bit mode]). This allows
the packet data to be input using a block memory transfer mechanism where the destination address
increments. Packet data to be transferred with Direction set to 0 can be transferred efficiently using a single
block transfer--depending on the number of words to be transferred, the transfer can be started at the
appropriate starting offset such that the EOP word gets the last packet word.
For example, when operating in 64-bit mode, in order to transfer 256-bit packet (four 64-bit words) with
Direction set to 0, block transfer can be started at Base 3 +0E0h with a transfer count of 4. The first three
FIFO Addressing
Packet
Size
64 bits
64-bit
32-bit
Direction
0
1
0
1
Not EOP
EOP
None
Base 3
+0F8h
Base 3 +00h
Base 3
+0F8h
Base 3 +00h
Base 3
+0F8h
Base 3 +00h
Base 3
+0FCh
2x (Base 3 +00h)
Base 3
+0FCh
3x (Base 3 +00h)
Base 3
+0FCh
Base 0 +08h
Base 0
+0Ch
96 bits
Not EOP
EOP
(Note1)
Not EOP
EOP
Base 0 +08h
Base 0
+0Ch
128 bits
Base 0 +08h
Base 0
+0Ch
SRAM Addressing
Packet
Size
64 bits
64-bit
32-bit
Direction
0
1
0
1
Not EOP
None
Base 3 +any offset other
than 0FCh
Base 3
+0FCh
Base 3 +any offset other
than 0FCh
Base 3
+0FCh
Base 3 +any offset other
than 0FCh
Base 3
+0FCh
EOP
Base 3
+0F8h
Base 3 +any offset other
than 0F8h
Base 3
+0F8h
Base 3 +any offset other
than 0F8h
Base 3
+0F8h
Base 0 +08h
Base 0
+0Ch
96 bits
Not EOP
EOP
(Note1)
Not EOP
Base 0 +08h
Base 0
+0Ch
128 bits
EOP
Base 0 +08h
Base 0
+0Ch
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