參數(shù)資料
型號(hào): PM2329
英文描述: Telecommunication IC
中文描述: 通信集成電路
文件頁數(shù): 142/162頁
文件大?。?/td> 1581K
代理商: PM2329
Proprietary and Confidential to PMC-Sierra, Inc and for its Customers
Internal Use
Document ID: PMC-2010146, Issue 4
145
PM2329 ClassiPI Network Classification Processor Datasheet
5.3.2.2.2 Processor Controlled Sequencing
When the OC Sequence Control Mode bit is set and OC Trace Enable bit is reset, the PM2329 operates in
Processor Controlled Sequencing
mode. In this case, the device will enter a Halt state at the end of OC
sequence, and set the Halt status to indicate a Wait condition. Refer to
Figure 31
and the Trace feature
description above regarding the options available to the processor in this case (Terminate Sequence or Start
New Sequence). In this mode, the packet is retained until the processor issues a Terminate Sequence
command.
Figure 31 Processor controlled Sequencing
When Processor Controlled Sequencing is enabled, it is possible to switch between OCC Sequencing and
ERAM Sequencing by writing the appropriate control word to the AOCC when the Start New Sequence
command is issued.
Note 1. When a Wait condition occurs, the processor can Start New Sequence
or Terminate Sequence using the AOCC Register
OCC
Sequencing
OCC
AOCC
OCD
OCC
AOCC
ERAM
OCD
ERAM
Sequencing
Wait
Wait
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