- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370008 > PM2329 Telecommunication IC PDF資料下載
參數(shù)資料
| 型號： | PM2329 |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁數(shù)： | 83/162頁 |
| 文件大小： | 1581K |
| 代理商： | PM2329 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁當前第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁
Proprietary and Confidential to PMC-Sierra, Inc and for its Customers
’
Internal Use
Document ID: PMC-2010146, Issue 4
86
PM2329 ClassiPI Network Classification Processor Datasheet
Rule memory write or read operation can be performed either in random access mode or in sequential
access mode. In general, the processor should set up the Rule Indirect Command Register to specify the
auto-increment mode, etc. It should then set up the address of the location or the starting address of the
block of locations to be accessed. It can then access the addressed location or access sequential location
depending on the programming of the auto-increment bit.
Note that read or write operations are performed internally when the trigger word is accessed as explained
below. However, if the RIAR, RICR or RIDR have not been written to since the last rule memory access,
an internal read to the rule memory is not performed since the current RIDR content correctly reflects the
address rule memory content.
During random reads, the processor must perform a dummy read (and discard the value read back) to
trigger the actual read internally, and then perform a second read to get the real data. For sequential reads,
only one (the first) dummy read is required for each block of data read sequentially. In either case, the first
dummy read needs to be performed to the trigger word only.
During writes, processor can simply write to the Indirect Data Register and the device will execute the
internal write cycle when the trigger word is written. There are no dummy writes to be performed,
however, the processor must ensure that all the enabled data words are written to first, before the trigger
word is written.
As long as the processor manages rule memory Write and Read operations using the RSR handshake, the
processor can perform these operations at any time even when OC sequencing is in progress--the read or
write operation will take place arbitrated by PM2329 control logic. The software must ensure coherency of
OC operation vs. its access operation. Also, it must manage multiple rule word updates using the RSR bit.
Note that all the rules in the rule memory are initialized to NO MATCH after the BIST sequence is
completed successfully; control software need not initialize unused rules.
Rule Updates when PM2329 is processing an OC
When an OC is in progress, rule update for all columns that are in the partition of the current OC is
deferred until the last result of the OC has been transferred out of the processing engine to the result FIFO.
This update deferral includes times when the processing engine has stalled if the Result FIFO is full, in
other words, the update will not occur during processing engine stalls.
Note that these columns can contain rules that belong to the current partition (as defined by the RSA and
REA fields) and those that do not belong to the current partition--none of the rules in these columns will be
updated until the condition stated above occurs.
Columns that are not participating in the current OC can be updated at all times. However, note if a rule
update is started that results in update deferral (since it belongs to a column of the current partition), the
RSR handshake control will prevent loading of a new rule to be updated that could otherwise be updated
(one that does not belong to a column of the current partition).
相關PDF資料 |
PDF描述 |
|---|---|
| PM239P | Analog Comparator |
| PM30RHC060 | TRANSISTOR | IGBT POWER MODULE | 3-PH BRIDGE | 600V V(BR)CES | 30A I(C) |
| PM3321-QC | DATA CROSS CONNECT|LDCC|84PIN|PLASTIC |
| PM355AJ | Voltage-Feedback Operational Amplifier |
| PM355AZ | Voltage-Feedback Operational Amplifier |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PM233-155.52M | 制造商:CONNOR-WINFIELD 制造商全稱:Connor-Winfield Corporation 功能描述:5.0x7.0mm Surface Mount LVPECL Clock Oscillator Series |
| PM2379-001 | 制造商:Delphi Corporation 功能描述:TAPE MARK WHT |
| PM238 | 制造商:PURDY 制造商全稱:PURDY 功能描述:AC Fans and Blowers |
| PM238-115-1751BT-4 | 制造商:INTERFAN 功能描述:Fan, AC, 115V, 172x150x51mm, Obround, 238CFM, 3100RPM, 55dBA, Terminal Block |
發(fā)布緊急采購，3分鐘左右您將得到回復。