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參數(shù)資料
| 型號(hào)： | T7630 |
| 廠商： | Lineage Power |
| 英文描述： | Dual T1/E1 5.0 V Short-Haul Terminator (Terminator-II)(雙 T1/E1 5.0V短距離通信終端器) |
| 中文描述： | 雙T1/E1的5.0V的短途終結(jié)者（終結(jié)者-Ⅱ）（雙個(gè)T1/E1 5.0V短距離通信終端器） |
| 文件頁(yè)數(shù)： | 25/210頁(yè) |
| 文件大?。?/td> | 3075K |
| 代理商： | T7630 |
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Lucent Technologies Inc.
25
Preliminary Data Sheet
October 2000
T7630 Dual T1/E1 5.0 V Short-Haul Terminator (Terminator II)
Line Interface Unit: Block Diagram
The T7630 LIU diagram is shown in Figure 5. Only a single transceiver is shown here for illustration purposes.
5-4556(F).g
Figure 5. Block Diagram of Line Interface Unit: Single Channel
TO RECEIVE
FRAMER
FROM TRANSMIT
FRAMER
RTIP
RRING
FLLOOP
(NO LIU AIS)
EQUALIZER
SLICERS
CLOCK AND
DATA
RECOVERY
RDLOS
RND_BPV
RPD
RLCK
DECODER
DLLOOP
RLOOP
TLCK-LIU
TND-LIU
JITTER
ATTENUATOR
(RECEIVE PATH)
TPD-LIU
(DUFLLOOP
PULSE-
WIDTH
CONTROLLER
TDM
LOTC
EPULSE
TRANSMIT
DRIVER
TTIP
TRING
SYSCK
LOSS OF
SYSCK
MONITOR
DIVIDE BY 16
ALARM
INDICATION
SIGNAL (AIS)
ENCODER
RALOS
JITTER
ATTENUATOR
(TRANSMIT PATH)
(CLOCK)
(DATA)
LOSS
OF
TLCK
LINE LENGTH
INDICATOR
(UNCOMMITTED FEATURE)
LBO
0.0 db
7.5 db
15.0 db
22.5 db
Line Interface Unit: Receive
Data Recovery
The receive line-interface unit (RLIU) transmission for-
mat is bipolar alternate mark inversion (AMI). The RLIU
accepts input data with a data rate tolerance of
±130 ppm (DS1) or ±80 ppm (E1). The RLIU first
restores the incoming data and detects ALOS. Subse-
quent processing is optional and depends on the pro-
grammable LIU configuration established within the
microprocessor interface registers. The RLIU utilizes
an adaptive equalizer to operate on line length with typ-
ically up to 3615 dB of loss at 772 kHz (T1/DS1) or
4313 dB loss at 1.024 MHz (E1). The signal is then
peak-detected and sliced to produce digital representa-
tions of the data. Selectable DLOS, jitter attenuation,
and data decoding are performed.
The clock is recovered by a digital phase-locked loop
that uses SYSCK as a reference to lock to the data rate
component. Because the reference clock is a multiple
of the received data rate, the internal RLCK (RLCK-
LIU) output will always be a valid DS1/CEPT clock that
eliminates false lock conditions. During periods with no
receive input signal from the line, the free-run fre-
quency of RLCK-LIU is defined to be either SYSCK/16
or SYSCK depending on the state of CKSEL. RLCK-
LIU is always active with a duty cycle centered at 50%,
deviating by no more than ±5%. Valid data is recovered
within the first few bit periods after the application of
SYSCK.
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| T8100 | H.100/H.110 Interface and Time-Slot Interchanger |
| T8110 | Version History |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| T7630426 | 制造商:COOPER INDUSTRIES 功能描述:CC ACCESYS / #2450 3/8 Spring Snap Link Stainless Steel UPC Tagged |
| T-7630-TL2-DB | 制造商:Legerity 功能描述:5V DUAL T1/E1 SHORT-HAUL TERMINATOR |
| T7633 | 制造商:AGERE 制造商全稱(chēng):AGERE 功能描述:Dual T1/E1 3.3 V Short-Haul Terminator |
| T7645036 | 功能描述:手工工具 Campbell Snap Link #2450, 7/16", Steel RoHS:否 制造商:Molex 產(chǎn)品:Extraction Tools 類(lèi)型: 描述/功能:Extraction tool |
| T7645106 | 制造商:COOPER INDUSTRIES 功能描述:CC ACCESYS / #7350 1/8 Quick Link Steel Zinc Plated UPC Tagged |
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