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| 型號(hào)： | T7630 |
| 廠商： | Lineage Power |
| 英文描述： | Dual T1/E1 5.0 V Short-Haul Terminator (Terminator-II)(雙 T1/E1 5.0V短距離通信終端器) |
| 中文描述： | 雙T1/E1的5.0V的短途終結(jié)者（終結(jié)者-Ⅱ）（雙個(gè)T1/E1 5.0V短距離通信終端器） |
| 文件頁(yè)數(shù)： | 81/210頁(yè) |
| 文件大小： | 3075K |
| 代理商： | T7630 |
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Lucent Technologies Inc.
81
Preliminary Data Sheet
October 2000
T7630 Dual T1/E1 5.0 V Short-Haul Terminator (Terminator II)
Auxiliary Framer I/O Timing
(continued)
5-6299(F)r.5
Figure 37. Timing Specification for TFS, TLCK, TPD, and TCRCMFS in CEPT Mode
Alarms and Performance Monitoring
Interrupt Generation
A global interrupt (pin 99) may be generated if enabled by register GREG1. This interrupt is clocked using channel
1 framer receive line clock (RLCK1). If RLCK1 is absent, the interrupt is clocked using RLCK2, the receive line
clock of channel 2. If both RLCK1 and RLCK2 are absent, clocking of interrupts is controlled by an interval
2.048 MHz clock generated from the CHI clock. Timing of the interrupt is shown in Figure 38 There is no relation
between MPCK (pin 101) and the interrupt, i.e., MPCK maybe asynchronous with any of the other terminator
clocks.
5-6563(F)
Figure 38. Relation Between RLCK1 and Interrupt (Pin 99)
TLCK
TFS
TCRCMFS
TPD
(SINGLE
RAIL)
TS0 OF FRAME #8
OF MULTIFRAME
1 ms
TS0 OF FRAME #0
OF MULTIFRAME
TS0 OF FRAME #0
OF MULTIFRAME
1 ms
RLCK1
INTERRUPT
(PIN 99)
Alarm Definition
The receive framer monitors the receive line data for
alarm conditions and errored events, and then presents
this information to the system through the microproces-
sor interface status registers. The transmit framer, to a
lesser degree, monitors the receive system data and
presents the information to the system through the
microprocessor interface status registers. Updating of
the status registers is controlled by the receive line
clock signal. When the receive loss of clock monitor
determines that the receive line clock signal is lost, the
system clock is used to clock the status registers and
all status information should be considered corrupted.
Although the precise method of detecting or generating
alarm and error signals differs between framing modes,
the functions are essentially the same. The alarm con-
ditions monitored on the received line interface are the
following:
1.
Red alarm
or the
loss of frame alignment
indica-
tion (FRM_SR1 bit 0).
The red alarm indicates that the receive frame align-
ment for the line has been lost and the data cannot be
properly extracted. The red alarm is indicated by the
loss of frame condition for the various framing formats
as defined in Table 38.
相關(guān)PDF資料 |
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| T8100A | H.100/H.110 Interface and Time-Slot Interchangers |
| T8102A | H.100/H.110 Interface and Time-Slot Interchangers |
| T8105A | H.100/H.110 Interface and Time-Slot Interchangers |
| T8100 | H.100/H.110 Interface and Time-Slot Interchanger |
| T8110 | Version History |
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