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參數(shù)資料
| 型號(hào)： | XRT7245 |
| 廠商： | Exar Corporation |
| 英文描述： | DS3 ATM User Network Interface(DS3異步傳輸模式用戶網(wǎng)絡(luò)接口) |
| 中文描述： | DS3自動(dòng)柜員機(jī)用戶網(wǎng)絡(luò)接口（DS3異步傳輸模式用戶網(wǎng)絡(luò)接口） |
| 文件頁(yè)數(shù)： | 318/324頁(yè) |
| 文件大?。?/td> | 4103K |
| 代理商： | XRT7245 |
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XRT7245
DS3 UNI FOR ATM
á
PRELIMINARY
REV. 1.03
XVIII
LIST OF FIGURES
Figure 1. Block Diagram of the XRT7245 DS3 UNI IC ......................................................................1
Figure 2. Pin Out of the XRT7245 DS3 UNI for ATM (160 pin QFP) ................................................2
Figure 3. System Level Interfacing of the XRT7245 DS3 UNI (DS3 Data is transmitted over Copper
Medium) ..............................................................................................................................................33
Figure 4. System Level Interfacing of the XRT7245 DS3 UNI
(DS3 data is transmitted over Optical Fiber .......................................................................................33
Figure 5. An Example of an Application of the XRT7245 UNI. ........................................................36
Figure 6. Functional Block Diagram of the XRT7245 DS3 UNI. ......................................................37
Figure 7. Simple Block Diagram of Microprocessor Interface block of UNI ....................................38
Figure 8. Behavior of Microprocessor Interface signals during an “Intel-type” Programmed I/O Read
Operation. ...........................................................................................................................................43
Figure 9. Behavior of the Microprocessor Interface Signals,
during an “Intel-type” Programmed I/O Write Operation. .................................................................44
Figure 10. Illustration of the Behavior of Microprocessor Interface signals, during a “Motorola-type”
Programmed I/O Read Operation. ......................................................................................................45
Figure 11. Illustration of the Behavior of the Microprocessor Interface signal, during a “Motorola-
type” Programmed I/O Write Operation. ...........................................................................................46
Figure 12. Behavior of the Microprocessor Interface Signals, during the “Initial” Read Operation of a
Burst Cycle (Intel Type Processor). ....................................................................................................47
Figure 13. Behavior of the Microprocessor Interface Signals, during subsequent “Read” Operations
within the Burst I/O Cycle. .................................................................................................................48
Figure 14. Behavior of the Microprocessor Interface signals, during the “Initial” Write Operation of a
Burst Cycle (Intel-type Processor) ......................................................................................................49
Figure 15. Behavior of the Microprocessor Interface Signals, during subsequent “Write” Operations
within the Burst I/O Cycle. .................................................................................................................50
Figure 16. Behavior of the Microprocessor Interface Signals, during the “Initial” Read Operation of a
Burst Cycle (Motorola Type Processor). ............................................................................................51
Figure 17. Behavior the Microprocessor Interface Signals, during subsequent “Read” Operations with-
in the Burst I/O Cycle (Motorola-type μC/μP) ..................................................................................52
Figure 18. Behavior of the Microprocessor Interface signals, during the “Initial” Write Operation of a
Burst Cycle (Motorola-type Processor). .............................................................................................53
Figure 19. Behavior of the Microprocessor Interface Signals, during subsequent “Write” Operations
with the Burst I/O Cycle (Motorola-type μC/μP). .............................................................................54
Figure 20. Block Diagram of the 8051 Microcontroller ...................................................................124
Figure 21. Schematic Depicting how to Interface the XRT7245 DS3 UNI to the 8051 Microcontroller
126
Figure 22. Schematic Depicting how to Interface the XRT7245 DS3 UNI to the MC68000 Micropro-
cessor. ...............................................................................................................................................127
Figure 23. Illustration of the UNI operating in the Line Loopback Mode. ......................................129
Figure 24. An Illustration of the UNI chip operating in the PLCP Loopback Mode. ......................130
Figure 25. An Illustration of the UNI chip operating in Cell Loopback Mode. ...............................131
Figure 26. Illustration of Line Side Test, while the UNI is configured to operate in the PLCP Loopback
Mode .................................................................................................................................................132
Figure 27. Illustration of Line Side Test, while the UNI is configured to operate in Line Loopback
相關(guān)PDF資料 |
PDF描述 |
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| XRT7288IP | CEPT1 Line Interface |
| XRT7288 | CEPT1 Line Interface(CEPT1線接口) |
| XRT7288IW | CEPT1 Line Interface |
| XRT7295AE | E3 (34.368Mbps) Integrated line Receiver |
| XRT7295AE_03 | E3 (34.368Mbps) Integrated line Receiver |
相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| XRT7250 | 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:DS3/E3 FRAMER IC |
| XRT7250ES-PCI | 功能描述:界面開(kāi)發(fā)工具 Evaluation Board for XRT7250 Series RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類(lèi)型:RS-485 工具用于評(píng)估:ADM3485E 接口類(lèi)型:RS-485 工作電源電壓:3.3 V |
| XRT7250IQ100 | 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:DS3/E3 FRAMER IC |
| XRT7288 | 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:CEPT1 Line Interface |
| XR-T7288 | 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:CEPT1 Line Interface |
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