á
PRELIMINARY
DS3 UNI FOR ATM
XRT7245
REV. 1.03
55
T
ABLE
4: R
EGISTER
A
DDRESSING
OF
THE
UNI P
ROGRAMMABLE
R
EGISTERS
A
DDRESS
R
EAD
M
ODE
R
EGISTER
W
RITE
M
ODE
R
EGISTER
R
EGISTER
T
YPE
00h
UNI Operating Mode Register
UNI Operating Mode Register
R/W
01h
UNI I/O Control Register
UNI I/O Control Register
R/W
02h
Part Number
R/O
03h
Version Number
R/O
04h
UNI Interrupt Enable Register
UNI Interrupt Enable Register
R/W
05h
UNI Interrupt Status Register
R/O
06h
Test Cell Control and Status Register
Test Cell Control and Status Register
(R/W portion only)
Combination of R/O
and R/W
07h
Future Use
Future Use
—
08h
Test Cell Header Byte 1
Test Cell Header Byte 1
R/W
09h
Test Cell Header Byte 2
Test Cell Header Byte 2
R/W
0Ah
Test Cell Header Byte 3
Test Cell Header Byte 3
R/W
0Bh
Test Cell Header Byte 4
Test Cell Header Byte 4
R/W
0Ch
Test Cell Error Accumulator—Most
Significant Byte
R/O
0Dh
Test Cell Error Accumulator—Least
Significant Byte
R/O
0Eh
Rx DS3 Configuration and Status
Register
Rx DS3 Configuration and Status
Register (R/W portion only)
Combination of R/O
and R/W
0Fh
Rx DS3 Status Register
R/O
10h
Rx DS3 Interrupt Enable Register
Rx DS3 Interrupt Enable Register
(R/W portion only)
Combination of R/O
and R/W
11h
Rx DS3 Interrupt Status Register
Combination of R/O
and RUR
12h
Rx DS3 FEAC Register
R/O
13h
Rx DS3 FEAC Interrupt Enable/Status
Register
Rx DS3 FEAC Interrupt Enable/Status
Register (R/W portion only)
Combination of R/U,
RUR and R/W
14h
Rx DS3 LAPD Controller Register
Rx DS3 LAPD Controller (R/W portion
only)
Combination of R/W
and RUR
15h
Rx DS3 LAPD Status Register
R/O
16h
Tx DS3 Configuration Register
Tx DS3 Configuration Register
R/W
17h
Tx DS3 M-Bit Mask Register
Tx DS3 M-Bit Mask Register
R/W
18h
Tx DS3 F-Bit Mask1 Register
Tx DS3 F-Bit Mask1 Register
(R/W portion only)
Combination of R/W
and R/O
19h
Tx DS3 F-Bit Mask2 Register
Tx DS3 F-Bit Mask2 Register
R/W
1Ah
Tx DS3 F-Bit Mask3 Register
Tx DS3 F-Bit Mask3 Register
R/W
1Bh
Tx DS3 F-Bit Mask4 Register
Tx DS3 F-Bit Mask4 Register
R/W
1Ch
Tx DS3 FEAC Configuration and Status
Register
Tx DS3 FEAC Configuration and Status
Register (R/W portion only)
Combination of R/W,
RUR and R/O