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參數(shù)資料
| 型號： | GT-64111 |
| 廠商： | Galileo Technology Services, LLC |
| 英文描述： | System Controller for RC4640, RM523X and VR4300 CPUs(用于RC4640, RM523X和 VR4300 CPUs的系統(tǒng)控制器) |
| 中文描述： | 系統(tǒng)控制器（用于RC4640，RM523X和VR4300處理器的系統(tǒng)控制器的RC4640，RM523X和VR4300處理器） |
| 文件頁數(shù)： | 38/130頁 |
| 文件大?。?/td> | 881K |
| 代理商： | GT-64111 |
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GT-64111 System Controller for RC4640, RM523X and VR4300 CPUs
Revision 1.0
3.
CPU/Local Master Interface
The GT-64111 SysAD bus interface allows the CPU/Local Master to gain access to the GT-64111’s internal registers,
PCI interface and the memory/device bus (AD bus). The SysAD bus supports accesses from one to 32 bytes in length.
The SysAD bus on the GT-64111 is a slave-only interface; the GT-64111 will never master the SysAD bus.
3.1
CPU/Local Master Interface Signals
The CPU/Local Master interface incorporates the following signals:
SysAD[31:0] - Master Address/Data. This bus transfers multiplexed address/data.
SysCmd[8:0] - Master Port Command. The SysCmd bus transfers information about the access (read/write,
size) and the data identifier (good/bad, last word.) Only SysCmd[4:0] are used in VR4300 mode.
ValidOut* - Indicates that the CPU/Local Master is driving valid address/data/command on the CPU/Local Mas-
ter bus.
ValidIn* - Indicates that the GT-64111 is driving valid data/data identifier on the CPU/Local Master bus.
WrRdy* - Indicates that the GT-64111 is capable of accepting a write transaction up to 8 words in length.
Release* - Indicates to the GT-64111 that the CPU/Local Master will not drive the SysAD after the current clock
cycle (i.e. the CPU/Local Master is floating the SysAD and SysCmd bus for completion of a read.)
The SysAD bus is synchronous with respect to TClk and is locked with respect to the AD bus. The SysAD may be
asynchronous with respect to the PCI bus, or locked to the PCI bus for lower synchronization latency.
3.2
SysAD and SysCmd Buses (9-bit SysCmd Mode)
The SysAD and SysCmd bus protocol implemented by the GT-64111 is completely compatible with the 32-bit Orion
bus protocol used by the IDT R4640 and R4650 processors. The GT-64111 extends this protocol to support bursts less
than 8 32-bit words. These extensions can be used by DMA engines on the SysAD bus for more efficient use of the
interface.
The SysAD[31:0] bus is a 32-bit multiplexed address/data bus. The CPU/Local Master drives address for a single cycle
then either drives data (for a write) or floats the bus is anticipation of returned data (for a read.)
The SysCmd[8:0] bus conveys information about the transaction such as the direction (read/write), the size (byte,
short, word, multi-word) and the status of the data (good/bad/last.) SysCmd is driven by the CPU/Local Master during
the address phase of a transaction (with direction/size information) and for the duration of a write (with good/bad/last
information.) The GT-64111 drives SysCmd during the data phase of read transactions.
The encodings for SysCmd[8:0] are shown in the tables below. Note that many encodings are not defined; these
encodings are reserved and must not be used. A summary of bit usage is shown below.
TABLE 1. SysCmd Bit Summary
S ysC md B i t
F unct i o n
SysCmd[8]
0 = Transaction information (read/write/size)
1 = Data information (good/bad/last)
SysCmd[7]
Indicates last data/not last data during data cycles.
Must be ‘0’ for address cycles.
SysCmd[6]
0 = Read transaction (during address cycles)
1 = Write transaction (during address cycles)
Must be ‘0’ for data cycles.
SysCmd[5]
Indicates error status for data cycles.
Must be ‘0’ for address cycles.
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