參數(shù)資料
型號： GT-64111
廠商： Galileo Technology Services, LLC
英文描述： System Controller for RC4640, RM523X and VR4300 CPUs(用于RC4640, RM523X和 VR4300 CPUs的系統(tǒng)控制器)
中文描述： 系統(tǒng)控制器（用于RC4640，RM523X和VR4300處理器的系統(tǒng)控制器的RC4640，RM523X和VR4300處理器）
文件頁數(shù)： 40/130頁
文件大小： 881K
代理商： GT-64111
GT-64111 System Controller for RC4640, RM523X and VR4300 CPUs
Revision 1.0
3.2.1
SysAD Read Protocol
SysAD reads occur in three phases:
The address phase in which address information is driven on the SysAD bus and command information is
driven on SysCmd.
The mid-burst data phase during which the GT-64111 drives data on the SysAD bus and a data identifier on
SysCmd. The mid-burst data phase is entered between the address phase and the last data of the burst.
The last data phase of the burst is when the GT-64111 drives data on the SysAD bus and a read end-of-data
(REOD) data identifier on SysCmd.
The address phase for all transactions begin with the assertion of ValidOut* to the GT-64111. Valid address and com-
mand information must be present on SysAD and SysCmd during this phase. Release* must also be asserted to the
GT-64111 to indicate that the CPU/Local Master is releasing mastership of the SysAD/SysCmd buses to the GT-64111
for completion of the read. ValidOut* is deasserted at the end of the address phase since the CPU/Local Master is no
longer driving information on SysAD/SysCmd.
For transactions longer than 32 bits, the mid-burst data phase is entered next. The GT-64111 will drive valid data on
SysAD, a valid data identifier (mnemonic = RD) on SysCmd, and will assert ValidIn* to qualify the SysAD and SysCmd
buses (see Figure 2).
The last data phase of the read burst is differentiated from the mid-burst state by the REOD data identifier driven on the
SysCmd bus. The last data phase of the burst is also entered for the datum returned for a single word, or sub-word,
read.
On the clock cycle following REOD, the GT-64111 floats the SysAD and SysCmd buses, returning ownership to the
CPU/Local Master.
Figure 2: Single Word Read Through CPU/Local Master Interface
1. ‘X’ denotes “don’t care” but ‘X’ signals are driven to a valid 0/1.
TABLE 4. CPU/Local Master Data Identifier SysCmd[8:0] Encodings (driven by CPU/Local Master)
S ysC md[ 8 :0 ] E n co din g 1
Co m m a n d
Mnemo n ic
C o mma nd D esc ri pti o n
8
7
6
5
4
3
2
1
0
1
0
1
EXXXXX
WEOD
Indicates last valid data in a burst
E = 0 Data is good
E = 1 Data is erroneous
1
EXXXXX
WD
Indicates valid data within a burst
E = 0 Data is good
E = 1 Data is erroneous
ADDR
RDWORD
DATA
REOD
TClk
ValidOut*
SysAD[31:0]
SysCmd[8:0]
Release*
ValidIn*
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