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LPC Interface Bridge Registers (D31:F0)
8-20
82801AA and 82801AB Datasheet
8.1.32
FUNC_DIS—Function Disable Register (LPC I/F—D31:F0)
Offset:
Default Value:
Lockable:
F2h–F3h
0000h
No
Attribute:
Size:
Power Well:
Read/Write
16 bits
Core
Bit
Description
15:9
Reserved
8
SMB_FOR_BIOS:
This bit is used in conjunction with bit 3 in this register.
1 = ‘Allows the SMBus I/O space to be accessible by software when bit 3 in this register is set. The
PCI configuration space is hidden in this case.
Note that if bit 3 is set alone, the decode of both SMBus PCI configuration and I/O space will be
disabled.
0 = No effect.
7
Reserved
6
F6_Disable:
Software sets this bit to disable the AC’97 modem controller function. When disabled,
the ICH does not decode the PCI configuration space registers, I/O ranges, or memory ranges
associated with the AC’97 modem controller. When this bit is set, the AC’97 modem controller will
not cause any interrupts or power management events.
0 = AC’97 Modem is enabled
1 = AC’97 Modem is disabled
5
F5_Disable:
Software sets this bit to disable the AC’97 audio controller function. When disabled,
the ICH does not decode the PCI configuration space registers, I/O ranges, or memory ranges
associated with the AC’97 audio controller. When this bit is set, the AC’97 audio controller will not
cause any interrupts or power management events.
0 = AC’97 audio controller is enabled
1 = AC’97 audio controller is disabled
4
Reserved.
3
F3_Disable:
Software sets this bit to disable the SMBus Host Controller function. When disabled,
the ICH does not decode the PCI configuration space registers, I/O ranges, or memory ranges
associated with the SMBus controller. When this bit is set, the SMBus controller will not cause any
interrupts or power management events.
0 = SMBus controller is enabled
1 = SMBus controller is disabled
2
F2_Disable:
Software sets this bit to disable the USB controller function. When disabled, the ICH
does not decode the PCI configuration space registers, I/O ranges, or memory ranges associated
with the USB controller. When this bit is set, the USB controller will not cause any interrupts or
power management events.
0 = USB controller is enabled
1 = USB controller is disabled
1
F1_Disable:
Software sets this bit to disable the IDE controller function. When disabled, the ICH
does not decode the PCI configuration space registers, I/O ranges, or memory ranges associated
with the IDE controller. When this bit is set, the IDE controller will not cause any interrupts or power
management events.
0 = IDE controller is enabled
1 = IDE controller is disabled
0
Reserved.