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AC’97 Audio Controller Registers (D31:F5)
12-8
82801AA and 82801AB Datasheet
NOTE:
1. Registers in bold are multiplexed between audio and modem functions
2. Registers in italics are for functions not supported by the ICH. The ICH does not support audio as a
secondary codec.
3. Software should not try to access reserved registers
The Bus Master registers are located from offset + 00h to offset + 51h and reside in the AC ‘97
controller. Accesses to these registers do NOT cause the cycle to be forwarded over the AC-link to
the codec.
In the case of the split codec implementation accesses to the different codecs are differentiated by
the controller by using address offsets 00h
–
7Fh for the primary codec and address offsets 80h
–
FEh
for the secondary codec.
The Global Control (GLOB_CNT) and Global Status (GLOB_STA) registers are aliased to the
same global registers in the audio and modem I/O space. Therefore a read/write to these registers in
either audio or modem I/O space affects the same physical register.
Bus Mastering registers exist in I/O space and reside in the AC ‘97 controller. The three channels,
PCM in, PCM out, and Mic in, each have their own set of Bus Mastering registers. The following
register descriptions apply to all three channels. The register definition section titles use a generic
“x_” in front of the register to indicate that the register applies to all three channels. The naming
prefix convention used in
Table 12-3
and in the register description I/O address is as follows:
PI = PCM in channel
PO = PCM out channel
MC = Mic in channel.
2Ch
PCM Front DAC Rate
2Eh
PCM Surround DAC Rate
30h
PCM LFE DAC Rate
32h
PCM LR ADC Rate
34h
MIC ADC Rate
36h
6Ch Vol: C, LFE Mute
38h
6Ch Vol: L, R Surround Mute
3Ah:56h
Intel RESERVED
58h
Vendor Reserved
7Ah
Vendor Reserved
7Ch
Vendor ID1
7Eh
Vendor ID2
Table 12-2. ICH Audio Mixer Register Configuration
Register
NAMBAR Exposed Registers (D31:F5)
Primary
Name