
LPC Interface Bridge Registers (D31:F0)
8-76
82801AA and 82801AB Datasheet
GPIO[12]
Input
Only
Unmuxed
Resume
Input active status read from GPE1_STS register
bit 12.
Input active high/low set through GPI_INV register
bit 12.
GPIO[13]
Input
Only
Unmuxed
Resume
Input active status read from GPE1_STS register
bit 13.
Input active high/low set through GPI_INV register
bit 13.
GPIO[14]
N/A
N/A
N/A
Not Implemented
GPIO[15]
N/A
N/A
N/A
Not Implemented
GPIO[16]
Output
Only
GNT[A]#
Core
Blink enabled via GPO_BLINK register bit 16.
Output controlled via GP_LVL register bit 16.
TTL driver output
GPIO[17]
Output
Only
GNT[B]# or
GNT[5]# on
ICH
(82801AA)
GNT[B]# only
on ICH0
(82801AB)
Core
Blink enabled via GPO_BLINK register bit 17.
Output controlled via GP_LVL register bit 17.
TTL driver output
GPIO[18]
N/A
N/A
N/A
Not Implemented
GPIO[19]
N/A
N/A
N/A
Not Implemented
GPIO[20]
N/A
N/A
N/A
Not Implemented
GPIO[21]
Output
Only
Unmuxed
Core
Blink enabled via GPO_BLINK register bit 21.
This GPIO defaults high for connection to MISA
NOGO input.
Output controlled via GP_LVL register bit 21.
TTL driver output
GPIO[22]
Output
Only
Unmuxed
Core
Blink enabled via GPO_BLINK register bit 22.
Output controlled via GP_LVL register bit 22.
TTL driver output
GPIO[23]
Output
Only
Unmuxed
Core
Blink enabled via GPO_BLINK register bit 23.
Output controlled via GP_LVL register bit 23.
Open drain driver output
GPIO[24]
Output
Only
SLP_S3#
Resume
Blink enabled via GPO_BLINK register bit 24.
Output controlled via GP_LVL register bit 24.
TTL driver output
GPIO[25]
Output
Only
SUS_STAT#
Resume
Blink enabled via GPO_BLINK register bit 25.
Output controlled via GP_LVL register bit 25.
TTL driver output
GPIO[26]
Output
Only
SUS_CLK on
ICH
(82801AA)
Unmuxed on
ICH0
(82801AB)
Resume
Output controlled via GP_LVL register bit 26.
Input active status read from GP_LVL register bit
26.
TTL driver output
Table 8-12. Summary of GPIO Implementation (Sheet 2 of 3)
GPIO
Type
Alternate
Function (1)
Power
Well
Notes