1996 Jul 25
12
Philips Semiconductors
Product specification
PRML Read Channel with PR4,
8/9 ENDEC, FWR Servo
P32P4911A
The Viterbi qualifier is implemented as two parallel qualifiers that operate on interleaved samples. Each qualifier has a
survival sequence register length of 5.
To facilitate media scan testing, the Viterbi survival sequence register may be bypassed by setting the BYPSR bit in the
Viterbi Detector Threshold (VDT) register.
Programmable Filter Circuit Description
The on-chip, continuous time, low pass filter has register programmable cutoff and boost settings, and provides both
normal and differentiated outputs. It is a 7th order filter that provides a 0.05
°
phase equiripple response. The group delay
is relatively constant up to twice the cutoff frequency. For pulse slimming two zero programmable boost equalization is
provided with no degradation to the group delay performance. The differentiated output is created by a single-pole,
single-zero differentiator. Both the boost and the filter cutoff frequency for data reads and the filter cutoff frequency for
servo reads are programmed through internal 7-bit DACs, which are accessed via the serial port logic. The nominal
boost range at the cutoff frequency is 0 to 13 dB for data reads and is controlled by the Data Boost Register. In servo
mode, the boost can be programmed in 2 dB steps from 0 to 6 dB by programming the two FBS bits (bits 6 and 7) in the
Filter Boost Servo register. The cutoff frequency, c is variable from 4 to 34 MHz and controlled by the Data Cutoff
Register or Servo Cutoff Register in the servo mode. The cutoff and boost values for servo reads are automatically
switched when servo mode is entered.
The filter zero locations can be programmed asymmetrically about zero to compensate for MR head time asymmetry.
The asymmetry is adjusted by programming the 6 FGD bits (bits 0-5) in the Filter Boost Servo register. The asymmetric
zeros are not usable while in servo mode.
The normal low pass filter is of a seven-pole two-real-zero type. Figure 5 illustrates the transfer function normalized to
1 rad/s. The response can be denormalized to the cutoff frequency of
c (Hz) by replacing s by s/2
π
c, while the boost
and group delay equalization are controlled by varying the
α
and
β
.
Figure 4: Viterbi Detection
Viterbi
Threshold
WIndow
Viterbi
Detector
Output
+ pulse detect
- pulse detect
For sequential pulses of the same
polarity, the latest is selected by the
survival sequence register logic since
it is always of greater magnitude.
+th
-th