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參數(shù)資料
| 型號： | P32P4911A |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 光電元器件 |
| 英文描述： | PRML Read Channel with PR4, 8/9 ENDEC, FWR Servo |
| 中文描述： | 1 CHANNEL READ CHANNEL, PQFP100 |
| 封裝： | 14 X 14 X 1.40 MM, PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 15/63頁 |
| 文件大?。?/td> | 257K |
| 代理商： | P32P4911A |
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1996 Jul 25
15
Philips Semiconductors
Product specification
PRML Read Channel with PR4,
8/9 ENDEC, FWR Servo
P32P4911A
F
ILTER
O
PERATION
Direct coupled differential signals from the AGC amplifier output are applied to the filter. The programmable bandwidth
and equalization characteristics of the filter are controlled by 3 internal DACs. The registers for these DACs (FC, FB,
and FGD) are programmed through the serial port. The current reference for the DACs is set using a single external
resistor connected from pin VRX to ground. The voltage at pin VRX is proportional to absolute temperature (PTAT),
hence the current for the DACs is a PTAT reference current. This establishes the excellent temperature stability for the
filter characteristics.
The cutoff frequency can be set independently in the servo mode and the data mode. In the data mode, the cutoff
frequency is controlled by the Data Cutoff Register. In the servo mode, the cutoff frequency is controlled by the Servo
Cutoff Register.
C
UTOFF
C
ONTROL
The programmable cutoff frequency from 4 to 34 MHz is set by the 7-bit linear FC DAC. The FC register holds the 7-bit
DAC control value. The cutoff frequency is set as:
c (MHz) = 0.301 * FC - 1.142 44
≤
FC
≤
117
for servo zones
c (MHz) = 0.277 * FCS + 0.08 14
≤
FCS
≤
43
The filter cutoff (c) is defined as the -3 dB bandwidth with no boost applied. When boost/equalization is applied, the
actual -3 dB point will move out. The ratio of the actual -3 dB bandwidth to the programmed cutoff is tabulated in
Table 1 as a function of applied boost and group delay equalization.
Figure 7: Filter Group Delay Response
Frequency (MHz)
A
SM00012
70
1
10
100
Cutoff = 0MHz
(i) 0dB Alpha Boost & 0% Group Delay Change
(ii) 13dB Alpha Boost & +30% Group Delay Change
DC Group Delay Change
Programmable from
–30% to +30%
(i)
(ii)
1
65
60
55
50
45
40
Group Delay Variation from
‘DC’ to Cutoff Frequency
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