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參數(shù)資料
| 型號： | P32P4911A |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 光電元器件 |
| 英文描述： | PRML Read Channel with PR4, 8/9 ENDEC, FWR Servo |
| 中文描述： | 1 CHANNEL READ CHANNEL, PQFP100 |
| 封裝： | 14 X 14 X 1.40 MM, PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 41/63頁 |
| 文件大小： | 257K |
| 代理商： | P32P4911A |
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1996 Jul 25
41
Philips Semiconductors
Product specification
PRML Read Channel with PR4,
8/9 ENDEC, FWR Servo
P32P4911A
PIN DESCRIPTIONS
Power Supply Pins
Pin Name
Type
Pin Function
VPA
VPF
VPT
VPP
VPD
VPC
VPS
VNA
VNF
VNT
VNP
VND
VNC
VNS
VNRX
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
AGC / Filter analog circuit supply
Time Base Generator PLL ECL plus Write pre-comp supply (connect to analog supply)
Time Base Generator PLL analog circuit supply
Data Separator PLL analog circuit supply
TTL Buffer I/O digital supply
Internal ECL, CMOS logic digital supply
Sampled data processor supply
AGC / Filter analog circuit ground
Time Base Generator ECL ground (connect to analog ground)
Time Base Generator PLL analog circuit ground
Data Separator PLL analog circuit ground
TTL Buffer I/O digital ground
Internal ECL, CMOS logic digital ground
Sampled data processor ground
AGC/Filter analog ground
Analog Input Pins
Pin Name
Type
Pin Function
VIA+, VIA-
I
AGC AMPLIFIER INPUTS: Differential AGC amplifier input pins
Analog Output Pins
Pin Name
Type
Pin Function
TPA+, TPA-
O
TEST PINS: Emitter output test points. Various signals are multiplexed to these test
points by the Test Point Control Register. The signals include the equalizer control voltage
and output, various timing loop control signals and the Viterbi survival register outputs.
The test points are provided to show how the signal is being processed. Internal "pull
down" resistors to ground are provided. To save power when not in test mode, the control
test register bits 3-5 must be set to "0".
TEST PINS: Emitter output test points similar to TPA+ and TPA-. The pins are used to
look at the other phase of the interleaved signals.
TEST PINS: Bi-directional test points which provide emitter outputs similar to TPA+ and
TPA- and provide differential input capability. The pins are used to look at the normal
outputs of the continuous time filter or the AGC amplifier output. These pins can also be
driven with DP/DN like signals for back end testing.
TEST PINS: Bi-directional test points which provide emitter output test points similar to
TPA+ and TPA- and provide differential input capability. The pins are used to look at the
differentiated outputs of the continuous time filter or the AGC amplifier output. These pins
can also be driven with CP/CN like signals for back end testing.
TEST PIN: Emitter output test point similar to TPA+. Provides servo FWR out when
enabled.
TPB+, TPB-
O
TPC+, TPC-
O
TPD+, TPD-
O
TPE
O
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