參數(shù)資料
型號: P32P4911A
廠商: NXP SEMICONDUCTORS
元件分類: 光電元器件
英文描述: PRML Read Channel with PR4, 8/9 ENDEC, FWR Servo
中文描述: 1 CHANNEL READ CHANNEL, PQFP100
封裝: 14 X 14 X 1.40 MM, PLASTIC, LQFP-100
文件頁數(shù): 16/63頁
文件大?。?/td> 257K
代理商: P32P4911A
1996 Jul 25
16
Philips Semiconductors
Product specification
PRML Read Channel with PR4,
8/9 ENDEC, FWR Servo
P32P4911A
B
OOST
C
ONTROL
The programmable alpha boost from 0 to 13 dB is set by the 7-bit linear FB DAC in data mode or 2-bit linear FBS DAC
in servo mode. The FB register holds the 7-bit DAC control value and the FBS register holds the 2-bit control value. The
alpha boost in data mode is set as:
Alpha Boost (dB) = 20 log [0.021848 * FB + 0.000046 * FC * FB + 1] 0
FB
127
The alpha boost in servo mode is set as:
Alpha Boost (dB) = 2 * FBS 0
FBS
3
That is, the boost in servo mode can be changed in 2 dB steps from 0 to 6 dB.
The programmed alpha boost is the magnitude gain at the cutoff frequency with no group delay equalization. When finite
group delay equalization is applied, the actual boost is higher than the programmed alpha boost. However, the difference
becomes negligible when the programmed alpha boost is >3 dB. Table 2 tabulates the actual boost as a function of the
applied alpha boost and group delay equalization.
Table 1: Ratio of Actual -3dB Bandwidth to Cutoff Frequency
Alpha Boost
Group Delay %
±
30%
1.62
1.74
1.87
2.01
2.14
2.25
2.35
2.44
2.52
2.59
2.67
2.73
2.80
2.87
±
25%
1.47
1.62
1.79
1.96
2.11
2.24
2.34
2.44
2.52
2.59
2.66
2.73
2.80
2.87
±
20%
1.31
1.50
1.71
1.91
2.09
2.23
2.34
2.43
2.51
2.59
2.66
2.73
2.80
2.86
±
15%
1.16
1.38
1.63
1.87
2.07
2.22
2.33
2.43
2.51
2.59
2.66
2.73
2.80
2.86
±
10%
1.06
1.28
1.56
1.83
2.05
2.21
2.33
2.42
2.51
2.59
2.66
2.73
2.80
2.86
±
5%
±
0%
0 dB
1
2
3
4
5
6
7
8
9
10
11
12
13
1.01
1.21
1.51
1.80
2.04
2.20
2.32
2.42
2.51
2.59
2.66
2.73
2.80
2.86
1.00
1.19
1.49
1.79
2.03
2.20
2.32
2.42
2.51
2.59
2.66
2.73
2.80
2.86
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