參數(shù)資料
型號: P32P4911A
廠商: NXP SEMICONDUCTORS
元件分類: 光電元器件
英文描述: PRML Read Channel with PR4, 8/9 ENDEC, FWR Servo
中文描述: 1 CHANNEL READ CHANNEL, PQFP100
封裝: 14 X 14 X 1.40 MM, PLASTIC, LQFP-100
文件頁數(shù): 40/63頁
文件大?。?/td> 257K
代理商: P32P4911A
1996 Jul 25
40
Philips Semiconductors
Product specification
PRML Read Channel with PR4,
8/9 ENDEC, FWR Servo
P32P4911A
Serial Port Register Definitions (Continued)
Complete Register ID String
A3
A2
A1
A0
S2
S1
S0
R/W
Control Operating Mode
Register #2 (CM2)
0
Bits 7-4
0
KM3-0
0
Equalizer outer tap coefficient km2
km2 = 0.0168 * KM (KM is in 2's compliment)
0111 = +0.117
0110 = +0.101
0101 = +0.0840
0100 = +0.0672
0011 = +0.0504
0010 = +0.0336
0001 = +0.0168
0000 = 0
1111 = -0.0168
1110 = -0.0336
1101 = -0.0504
1100 = -0.0672
1011 = -0.0840
1010 = -0.1010
1001 = -0.1170
1000 = -0.1350
Test Mode Enable
0 = TPC and TPD active when SG = 1 and bit 7 of Power
Down Control Register is 1
1 = TPC and TPD as set by bits 6 and 7 of the Power Down
Control Register
Precoder Polarity State
0 = Precoder state set to 0
1 = Precoder state set to 1
Qasym and Q Time Constant Control (TME = 1)
Qasym Q
00 = 100 ns 50 ns
01 = 200 ns 100 ns
10 = 400 ns 200 ns
11 = 800 ns 400 ns
Precoder Set Disabled (TME = 0)
0 = Precoder initialization enabled
1 = Precoder initialization disabled
0
0
1
1
0
06H
Bit 3
TME
Bit 2
PCSPOL
Bits 1-0
QTC1-0
Bit 0
PCSDIS
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