參數(shù)資料
型號: P32P4911A
廠商: NXP SEMICONDUCTORS
元件分類: 光電元器件
英文描述: PRML Read Channel with PR4, 8/9 ENDEC, FWR Servo
中文描述: 1 CHANNEL READ CHANNEL, PQFP100
封裝: 14 X 14 X 1.40 MM, PLASTIC, LQFP-100
文件頁數(shù): 49/63頁
文件大?。?/td> 257K
代理商: P32P4911A
1996 Jul 25
49
Philips Semiconductors
Product specification
PRML Read Channel with PR4,
8/9 ENDEC, FWR Servo
P32P4911A
AGC Characteristics
Unless otherwise specified, recommended operating conditions apply.
AGC A
MPLIFIER
The input signals are AC coupled to VIA+ and VIA-. Integrating capacitor C
BYP
= 1000 pF, is connected between BYP
and VPA. Integrating capacitor C
BYPS
= 1000 pF, is connected between BYPS and VPA. Unless otherwise specified,
the output is measured differentially at TPC+ and TPC-, Fin = 5 MHz, the filter frequency
c = max
and the filter boost = 0 dB. All specifications apply equally to servo and read mode prior to SFC.
Symbol
Parameter
Test Conditions
Filter Boost =0 dB @
c
4 MHz
c
34 MHz, Fin =
c
Input range
Filter Boost =11 dB @
c
9 MHz
c
34 MHz, Fin =
c
ON
ON
±
voltage
measured @ TPC
±
1,1,-1,-1,--- pattern
DP/DN output selected
5 MHz <
c < 34 MHz, Fin =
c
Boost = 0 to 13 dB
DP/DN
Voltage variation
20mVppd < VIA < 250mVppd
Gain range
Gain sensitivity
BYP or BYPS voltage
change
R
in
Differential input
resistance
LOWZ = Low, LZTC = High
LOWZ = High, LZTC = x
Single-ended input
resistance
LOWZ = Low, LZTC = High
LOWZ = High, LZTC = x
V
OO
Output offset change
From gain = 3 V/V to 64 V/V
With DC cancellation off
e
in
Input noise voltage
Fixed Gain = 24 dB, Rs = 0
CMRR
Common mode rejection
Fixed Gain = 24 dB, Rs = 0
PSRR
Power supply rejection
Fixed Gain = 24 dB, Rs = 0
Min.
Nom.
Max.
Unit
Input range
20
250
mVppd
20
200
mVppd
VIA = 20 to 250 mVppd
1.19
1.40
1.61
Vppd
5.0
64
%
V/V
dB/V
3
38
LOWZ = Low, LZTC = Low
5.9
1.7
450
7.6
2.7
634
3.8
1.4
317
8.9
4.0
850
k
k
k
k
mV
LOWZ = Low, LZTC = Low
200
15
30
nV/
Hz
dB
dB
40
45
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