參數(shù)資料
型號: 82815EM
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù): 116/163頁
文件大?。?/td> 1049K
代理商: 82815EM
Intel
82815EM GMCH
R
116
Datasheet
4.2.1.4.
Expansion Area (C0000h-DFFFFh)
This 128 KB ISA Expansion region is divided into eight 16 KB segments. Each segment can be assigned
one of four Read/Write states: read-only, write-only, Read/Write, or disabled. Typically, these blocks
are mapped through GMCH2-M and are subtractively decoded to ISA space. Memory that is disabled is
not remapped.
4.2.1.5.
Extended System BIOS Area (E0000h-EFFFFh)
This 64 KB area is divided into four 16 KB segments. Each segment can be assigned independent read
and write attributes so it can be mapped either to main DRAM or to the hub interface. Typically, this
area is used for RAM or ROM. Memory segments that are disabled are not remapped elsewhere.
4.2.1.6.
System BIOS Area (F0000h-FFFFFh)
This area is a single 64KB segment. This segment can be assigned read and write attributes. It is by
default (after reset) Read/Write disabled and cycles are forwarded to the hub interface. By manipulating
the Read/Write attributes, the GMCH2-M can “shadow” BIOS into the main DRAM. When disabled,
this segment is not remapped.
4.3.
Extended Memory Area
This memory area covers 10 0000h (1 MB) to FFFF FFFFh (4 GB-1) address range and it is divided into
the following regions:
Main DRAM Memory from 1 MB to the Top of Main Memory (TOM); maximum of 512 MB.
PCI Memory space from the Top of Memory to 4 GB
4.3.1.
Main DRAM Address Range (0010_0000h to TOM)
The address range from 1 MB to the top of main memory (TOM) is mapped to main DRAM address
range. The Tom of memory is limited to 512Mb. All accesses to addresses within this range will be
forwarded to the DRAM unless a hole in this range is created.
4.3.1.1.
15MB-16MB Hole Area
A hole can be created at 15MB-16MB as controlled by the fixed hole enable (FDHC register) in Device
0 space. Accesses within this hole are forwarded to the hub interface. The range of physical DRAM
memory disabled by opening the hole is not remapped to the Top of the memory – that physical DRAM
space is not accessible. This 15MB-16MB hole is an optionally enabled ISA hole. Video accelerators
originally used this hole. It is also used by validation and customer SV teams for some of their test cards.
That is why it is being supported. There is no inherent BIOS request for the 15-16 hole.
4.3.1.2.
Extended SMRAM Address Range
The HSEG and TSEG SMM transaction address spaces reside in this extended memory area. This
memory resource is normally hidden from the system OS so that the processor has immediate access to
this memory space upon entry to SMM.
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