參數(shù)資料
型號： 82815EM
英文描述： Controller Miscellaneous - Datasheet Reference
中文描述： 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù)： 51/163頁
文件大小： 1049K
代理商： 82815EM
Intel
82815EM GMCH
R
Datasheet
51
Bit
Description
6
CPU Latency Timer (CLT).
0 = Deferrable processor cycle will be Deferred immediately after receiving another ADS#
1 = Deferrable processor cycle will be Deferred after it has been held in a “Snoop Stall” for 31 clocks
and another ADS# has arrived (default).
5
Reserved
4
Local Memory Frequency Select (LMFS).
This bit selects the operating frequency for the Local
Memory Controller. Default is set by sampling LM_FREQ_SEL strap (AGP SBA[7] pin) at reset. It has
a weak internal pull-up enabled during reset.
0 = 100MHz. This is a reflection of LM_FREQ_SEL strap being pulled down.
1 = 133MHz, (default). This is a reflection of LM_FREQ_SEL strap being pulled up (default).
Note: This bit has meaning only when operating in Internal graphics modes w/ display cache.
Note: The value of this bit should only be changed when the Internal Graphics device is
disabled
(i.e., GMS = 00).
3
DRAM Page Closing Policy (DPCP).
When this bit is a 0 GMCH2-M will tend to leave the DRAM
pages open. In this mode the only times that GMCH2-M will close memory pages are:
0 = Precharge Bank during service of a “Page Miss” access.
Precharge All when changing from one Row to another if any Pages are open.
Precharge All at leadin to a Refresh operation
When this bit is a
1 GMCH2-M will tend to leave the DRAM pages closed. In this mode GMCH2-M will:
1 = Precharge All during the service of any “Page Miss” access.
Precharge All when changing from one Row to another if any Pages are open.
Precharge All at leadin to a Refresh operation.
2
System Memory Frequency Select (SMFS).
This bit selects the operating frequency for the main
system memory. Default is set by sampling SBS0# pin at reset. When GMCH2-M is in Graphics mode,
this bit is hardwired to ‘0’ (100MHz) and read only.
0 = 100MHz.
1 = 133MHz.
1:0
Reserved.
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