參數(shù)資料
型號: 82815EM
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù): 87/163頁
文件大小: 1049K
代理商: 82815EM
Intel
82815EM GMCH
R
Datasheet
87
3.7.14.
IOBASE—I/O Base Address Register (Device 1)
Address Offset:
1Ch
Default Value:
F0h
Access:
Read/Write
Size:
8 bits
This register control the processor to PCI1/AGP I/O access routing based on the following formula:
IO_BASE=< address =<IO_LIMIT
Only upper 4 bits are programmable. For the purpose of address decode, address bits A[11:0] are treated
as 0. Thus the bottom of the defined I/O address range will be aligned to a 4KB boundary.
Note:
BIOS must not set this register to 00h otherwise 0CF8h/0CFCh accesses will be forwarded to AGP
7
4
3
0
I/O Address Base
I/O Addressing Capability
Bit
Description
7:4
I/O Address Base.
Corresponds to A[15:12] of the I/O address.
Default=Fh
3:0
I/O Addressing Capability.
Hardwired to 0h indicating that only 16 bit I/O addressing is supported. Bits
[31:16] of the I/O base address is assumed to be 0000h.
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