參數(shù)資料
型號： 82815EM
英文描述： Controller Miscellaneous - Datasheet Reference
中文描述： 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù)： 50/163頁
文件大?。?/td> 1049K
代理商： 82815EM
Intel
82815EM GMCH
R
50
Datasheet
3.6.13.
CAPPTR—Capabilities Pointer (Device 0)
Address Offset:
34h
Default Value:
88h
Access:
Read Only
Size:
8 bits
The CAPPTR provides the offset that is the pointer to the location where the capability identification
register is located.
Bit
Description
7:0
Pointer to the start of the CAPPTR linked list.
The 88h value points to the CAPID register that provides capability information regarding the GMCH2-
M.
3.6.14.
GMCHCFG—GMCH2-M Configuration Register (Device 0)
Address Offset:
50h
Default:
01ss0s00
Access:
Read/Write, Read Only
Size:
8 bits
7
6
5
4
3
2
1
0
Mem Arb
Gnt Win
Enable
CPU
Latency
Timer
Reserved
Local
Memory
Frequency
Select
DRAM
Page
Closing
Policy
System
Memory
Frequency
Select
Reserved
Bit
Description
7
Memory Arbiter Grant Window Enable (MAGWE).
This bit controls the Host vs Low Priority Graphics
timeslice regulation in the arbiter for the System DRAM.
At pre-arbitration (aka, stage 1)
0 = Disabled. Enforce fixed priority.
1 = Limit grant to host-to-graphics stream to 6 consecutive packets.
At main-arbitration (aka, stage 2)
0 = Disabled. Enforce fixed priority.
1 = 24 clocks limiting host, 24 clocks guaranteed to low priority graphics stream.
In fixed mode arbitration, MAGWE=0, the host stream always has higher priority over the low priority
graphics stream for accesses to system memory. In timeslice mode, the host stream and the low
priority graphics stream are both regulated by a time window to provide fairness to the graphics
stream. Fixed priority mode where the host stream is always favored is the recommended mode of
operation, as this setting gives highest system performance without adversely affecting graphics
performance under real life applications workload.
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