![](http://datasheet.mmic.net.cn/290000/XPC801ZP25_datasheet_16187868/XPC801ZP25_602.png)
Index
MOTOROLA
MPC801 USER’S MANUAL
Index-11
INDEX
static branch prediction,
6-5
watchpoint marking,
6-5
instruction issue,
6-6
interrrupt ordering, 6-13
interrupt ordering
types,
6-13
interrupt timing,
6-11
interrupts
,
6-6
exception sources,
6-6
precise exception model implementation, 6-8
restartability,
6-10
serialization, 6-12
external interrupt latency,
6-13
possible actions
execution serialization,
6-12
fetch serialization,
6-12
sequencing error encoding,
18-39
sequential instructions marked as indirect
branch,
18-5
serial clock pin,
16-28
serial communication modules, 16-1
I
2
C controller,
16-26
parallel I/O port,
16-35
serial controller
programming model,
16-15
serial peripheral interface,
16-15
serial controller, 16-15
memory map,
3-3
,
A-8
programming model,
16-15
serial data pin,
16-28
serial interface signals,
16-2
serial interface unit
bus monitor,
12-10
freeze operation,
12-15
interrupt controller programming model
SIEL register,
12-8
SIMASK register,
12-7
SIPEND register,
12-6
SIVEC register,
12-9
interrupt sources, 12-5
priority,
12-5
low power stop operation,
12-15
periodic interrupt timer,
12-12
pins multiplexing,
12-16
PowerPC decrementer,
12-10
PowerPC timebase,
12-11
programming model, 12-17
decrementer register,
12-23
system timer register,
12-23
real-time clock,
12-11
software watchdog timer,
12-13
system configuration and protection
registers, 12-17
internal memory map register,
12-20
software service register,
12-22
system protection control
register,
12-21
transfer error status register,
12-22
serial peripheral interface, 1-7
,
16-15
block diagram,
16-16
clocking and pin functions,
16-17
features,
16-16
master mode,
16-18
memory map,
3-3
,
A-8
multi-master operation,
16-19
programming model,
16-20
receiver and transmitter depths,
16-16
slave mode, 16-19
transmission and reception process,
16-18
serialization latency,
6-12
show cycles,
13-35
SIEL,
12-8
signal pins, of the TAP,
19-1
signals
clocks and power control,
5-9
system bus,
2-2
signals, external, 2-1
description
A(6-31),
2-2
AS,
2-7
AT2,
2-6
AT3,
2-7
BADDR(28-30),
2-7
BB,
2-4
BDIP,
2-2
BG,
2-4
BI,
2-3
BPL_B1,
2-5
BR,
2-4
BS_B0,
2-5
BS_B1,
2-5
BS_B2,
2-5
BS_B3,
2-5
BURST,
2-2
CLKOUT,
2-6
CR,
2-3
CS(0-5),
2-5
CS(2-3),
2-5
D(0-31),
2-3
DP0,
2-3
DP1,
2-4
DP2,
2-4
DP3,
2-4
DSCK,
2-9
DSCK/AT1,
2-6
DSDI,
2-9