SBI Bus Serializer ASSP Telecom Standard Product Data Sheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000168, Issue 5
327
Figure 15 “C1” Synchronization Control
Ingress SBI
device
Ingress SBS
(1 frame delay)
Egress SBS
(1 frame delay)
125 s Source
delay
t
1
t
0
,
t
1
t
2
t
3
t
4
delay
125 s
t at 0 s
Egress SBI
device
delay
t
2
delay
t
3
delay
t
4
t
0
NSE
delay
125 s
(no delay t delay through
Ingress SBI device)
13.14 Synchronized Control Setting Changes
The NSE-20G and SBS support dual switch control settings. These dual settings permit one
bank of settings to be operational while the other bank is updated as a result of some new
connection requests. The CMP input selects the current operational switch control settings.
CMP is sampled by the SBS and the NSE-20G on the base timing pulse
t.
The internal blocks
sample the registered CMP value as they receive the next C1 character –at least a delay of
RC1DLY. The new CMP value is applied on the first A1 character of the following STS-
12/STM-4 frame or multi-frame. This switchover is hitless; the control change does not disrupt
the user data flow in any way. This feature is required for the addition of arbitrary new
connections, as existing connections may need to be rerouted (see the discussion of the
connection routing algorithm in this document).
The DS0-granularity switch settings RAM is organized into two control settings banks, these
are switched by the above mechanisms on C1 boundaries. The NSE also has to coordinate the
switching of the connected SBS devices (if using the In-Band link facility), so a broader
understanding of the issues is required.
To illustrate the system, the following describes actual examples:
13.14.1
SBS/NSE Systems with DS0 and CAS switching
When building a DS0 and Channel Associated Signaling switching system with the SBS,
SBSLITE and NSE devices the overall timing is based on the CAS signaling multi-frame on the
SBI bus. In this configuration the delay through the SBS devices is a single 125uS SBI frame
plus a few 77.76MHz clocks and the delay through the NSE is a few 77.76MHz clocks. A
single C1FP frame synchronization signal is distributed around the system. Internal to the SBS
and NSE devices are programmable offsets used to account for propagation delays through the
system. The key constraint is that all SBI frames are aligned going into the NSE device.
Compatible devices are TEMUX84, FREEDM336, FREEDM336-84, IMA84, and other future
SBI336 devices.