SBI Bus Serializer ASSP Telecom Standard Product Data Sheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000168, Issue 5
40
Pin Name
Type
Pin
No.
Function
a 19.44MHz Telecom bus, all 4 C1 positions must be
aligned and the four signals, IC1FP[4:1], are logically
ORed together internally.
IC1FP[4:1] is sampled on the rising edge of SREFCLK.
IC1FP[4:2] have integral pull-up resistors.
Incoming Bus Data (IDATA[4:1][7:0]).
The Incoming
data buses, IDATA[4:1][7:0], are separate time division
multiplexed buses which transports tributaries by
assigning them to fixed octets within the SBI or
Telecom Bus structure.
Multiple SBI/SBI336 devices can drive this bus at
uniquely assigned tributary columns within the
SBI/SBI336 bus structure.
IDATA[1][7:0] can be either a 19.44MHz SBI or
Telecom bus when combined with IDATA[4:2][7:0] or
can be used as a standalone 77.76MHz SBI336 or
Telecom bus.
IDATA[4:1][7:0] is sampled on the rising edge of
SREFCLK.
IDATA[4:2][7:0] have integral pull-up resistors.
IDATA[4][7]
IDATA[4][6]
IDATA[4][5]
IDATA[4][4]
IDATA[4][3]
IDATA[4][2]
IDATA[4][1]
IDATA[4][0]
IDATA[3][7]
IDATA[3][6]
IDATA[3][5]
IDATA[3][4]
IDATA[3][3]
IDATA[3][2]
IDATA[3][1]
IDATA[3][0]
IDATA[2][7]
IDATA[2][6]
IDATA[2][5]
IDATA[2][4]
IDATA[2][3]
IDATA[2][2]
IDATA[2][1]
IDATA[2][0]
IDATA[1][7]
IDATA[1][6]
IDATA[1][5]
IDATA[1][4]
IDATA[1][3]
IDATA[1][2]
IDATA[1][1]
IDATA[1][0]
Input
U25
U26
V23
V24
V25
W24
W23
W25
AE7
AE6
AF5
AC7
AD6
AE5
Y4
AB1
AE12
AD12
AF11
AC12
AE11
AF10
AD11
AE10
E1
G4
F3
E2
F4
E3
D2
C1
IDP[4]
IDP[3]
IDP[2]
IDP[1]
Input
U23
AD8
AF12
G3
Incoming Bus Data Parity (IDP[4:1]).
The Incoming
data parity signals carry the even or odd parity for the
corresponding Incoming buses. In SBI/SBI336 modes,
the parity calculation encompasses the IDATA[x][7:0],
IPL[x] and IV5[x] signals. In Telecom bus mode, the
parity calculation encompasses the IDATA[x][7:0] and
optionally the IC1FP[x] and IPL[x] signals.
Multiple SBI/SBI336 devices can drive this signal at
uniquely assigned tributary columns within the
SBI/SBI336 bus structure. This parity signal is intended
to detect multiple sources in the column assignment.
IDP[1] can be part of either a 19.44MHz SBI or Telecom
Bus when combined with IDP[4:2] or can be used as
part of a standalone 77.76MHz SBI336 or Telecom Bus.