SBI Bus Serializer ASSP Telecom Standard Product Data Sheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000168, Issue 5
74
10.5 CAS Merging
The Channel Associated Signaling Merge blocks, ICASM and OCASM, insert the CAS
signaling information into the SBI bus on a tributary basis. CAS signaling channels within the
SBI bus are constructed out of the available CAS bits for T1 and E1 SBI tributaries that are
enabled for CAS signaling. The resulting CAS signaling channel replaces the octets of the SBI
bus where the new CAS signaling is to be inserted. This function is enabled on a per-tributary
basis and can be used for T1 and E1 tributaries simultaneously across different SBI SPEs. This
block adds one T1 multi-frame (24 frames) or one E1 multi-frame (16 frames) of latency to the
CAS bits.
10.6 Incoming SBI336 Tributary Translator
The Incoming SBI336 Tributary Translator block, ISTT, translates all SBI336 timing and
Channel Associated Signaling information for all tributaries into SBI336S format. The output
from this block is a 77.76MHz SBI336 stream with all tributaries and control signals encoded
into an internal format that closely resembles the serial SBI336S format.
This block translates all tributary types into a form that is easy for the 8B/10B encoder to handle
in a more generic form. A control RAM keeps the current configuration for each of the
incoming SBI bus tributaries so that it can perform the translation function.
Common to all tributaries is identification of the first C1 byte. There are unique mappings of the
8B/10B codes for the supported SBI and SBI336 bus link types: Asynchronous T1/E1,
Synchronous (locked) T1/E1, Transparent VT1.5/VT2, DS3/E3 and Fractional rate links. Much
of the identification and mapping of a link into serial SBI format is based on the C1 frame pulse
and a tributaries location relative to that C1 pulse. In addition to the C1FP identification this
block identifies multi-frame alignment, valid payload, pointer movements for floating
tributaries and timing control for encoding into the 8B/10B serial SBI format.
This block is transparent in Telecom bus mode.
10.7 PRBS Processors
The Working and Protection PRBS Processor blocks, WPP and PPP, provides in-service and off-
line PRBS generation and detection for diagnostics of the equipment downstream of the two
LVDS links. Each PRBS Processor has the capacity to source and monitor PRBS data for the
associated Working or Protection Serial SBI336S stream with a granularity of unchannelized
SBI SPEs of telecom bus STS/AUs.
10.7.1
PRBS Generator
The PRBS generator sub-block optionally overwrites the data originating from the incoming
data streams, IDATA[4:1][7:0]. When enabled, the PRBS generator sub-block inserts
synchronous payload envelope, SPE bytes into the serial transmit links. The inserted data is
derived from an internal linear feedback shift register (LFSR) with a polynomial of X
23
+ X
18
+
1.