SBI Bus Serializer ASSP Telecom Standard Product Data Sheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000168, Issue 5
33
Pin Name
Type
Pin
No.
Function
on the receive parallel data bus. RV5 is set high to
mark the V5 bytes on the bus.
RV5 is sampled on the rising edge of SYSCLK.
RV5 has an integral pull-up resistor.
RTPL
Input
B8
Receive Tributary Payload (RTPL).
This signal
indicates valid tributary payload data when configured
for the receive byte wide Telecom bus interface.
RTPL is set high during valid VC11 and VC12 bytes.
RTPL is set low for all transport overhead bytes, high
order path overhead bytes, fixed stuff column bytes and
tributary transport overhead bytes (V1,V2,V3,V4).
RTPL is ignored when configured for SBI336 mode.
RTPL is sampled on the rising edge of SYSCLK.
RTPL has an integral pull-up resistor.
RTAIS
Input
A7
Receive Tributary AIS Indicator (RTAIS).
This signal
indicates tributaries in low order path AIS state when
configured for the receive byte wide Telecom bus
interface.
RTAIS is set high when the tributary on the receive bus
is in AIS state and is set low when the tributary is out of
AIS state.
RTAIS is ignored when configured for SBI336 mode.
RTAIS is sampled on the rising edge of SYSCLK.
RTAIS has an integral pull-up resistor.
RJUST_REQ
Input
A11
Receive Justification Request (RJUST_REQ).
This is
the receive side justification request when configured
for SBI336 byte wide interface instead of the Serial
SBI336S interface and when connecting to a PHY
device. This signal is not used when connecting to a
SBI336 link layer device nor when in telecom bus
mode.
The SBI336 Bus Justification Request signal,
RJUST_REQ, is used to speed up, slow down or
maintain the minimal rate of a slave timed SBI device.
This active high signal indicates negative timing
adjustments on the SBI336 bus when asserted high
during the V3 or H3 octet, depending on the tributary
type. In response to this the slave timed SBI336 device
should send an extra byte in the V3 or H3 octet of the
next frame along with a valid payload signal indicating a
negative justification.
This signal indicates positive timing adjustments on the
SBI336 bus when asserted high during the octet
following the V3 or H3 octet, depending on the tributary
type. The slave timed SBI336 device should respond to
this by not sending an octet during the V3 or H3 octet of
the next frame along with a valid payload signal
indicating a positive justification.
For fractional rate links this signal is asserted high
during any available information byte to indicate to the