SBI Bus Serializer ASSP Telecom Standard Product Data Sheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000168, Issue 5
72
Table 20 shows how 12 SPEs are multiplexed into a 77.76MHz SBI336 bus. The structure is
exactly the same as byte interleaving four 19.44MHz SBI buses. 1,SPE1 identifies SPE1 from
the first SBI equivalent bus, 2,SPE1 identifies SPE1 from the second SBI equivalent bus, and so
on. All tributary mapping formats are exactly the same as for the 19.44MHz SBI bus with the
only difference that there are four times the number of tributaries. Tributary numbering appends
the equivalent SBI number to the original SBI numbering. For example, the first T1 in a SBI bus
would be numbered T1 #1,1 whereas the first T1 in a SBI336 bus would be numbered T1
#1,1,1. Likewise the second T1 in a SBI bus would be T1 #2,1 whereas the second T1 in a
SBI336 bus would be T1 #2,1,1.
10.2 Incoming SBI336 Timing Adapter
The Incoming SBI336 Timing Adapter, ISTA, provides a multiplexing function of four
incoming 19.44MHz SBI or Telecom buses into a 77.76MHz SBI336 or Telecom bus. This
involves simple column muxing of the four incoming SBI or Telecom buses. The timing
adapter block also provides a transparent mode when the incoming interface is already in
SBI336 or 77.76MHz Telecom bus format.
When the SBS is connected to an 19.44MHz SBI physical layer device, the justification request
signal, JUST_REQ, is an input to the SBS and is aligned to the outgoing bus. This block re-
aligns the justification request signal from the outgoing frame alignment, marked by OC1FP, to
the internal incoming SBI336 frame alignment. When the SBS is connected to a 19.44MHz SBI
link layer device or any 77.76MHz SBI336 device, no re-alignment of the justification request
is required by this block.
10.3 CAS Expanders
The Channel Associated Signaling Expander blocks, ICASE and OCASE, pull the CAS
information from the SBI336 formatted bus on a tributary basis so that it can be switched
through the memory switch with the DS0 data. For tributaries enabled for DS0 switching the
Channel Associated Signaling bits (CAS bits) are double buffered on a signaling multi-frame
boundary and repeated along side the tributary data for the duration of the multi-frame. This
block can be used for T1 and E1 tributaries simultaneously across different SBI SPEs. This
block adds one T1 multi-frame (24 frames) or one E1 multi-frame (16 frames) of latency to the
CAS bits.
10.4 Memory Switch Units
The Memory Switch Unit blocks, IMSU and OMSU, provide DS0 or column switching of the
SBI336 or 77.76MHz Telecom bus. Any input byte (or column) can be switched to any output
byte (or column). Four bits of Channel Associated Signaling (CAS) and three or four bits of
control information are switched along with the data byte. In SBI336 mode, the control signals
are PL, V5 and JUST_REQ. In Telecom bus mode, the control signals are PL, TPL, V5 and
TAIS.