SBI Bus Serializer ASSP Telecom Standard Product Data Sheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000168, Issue 5
37
Pin Name
Type
Pin
No.
Function
structure.
In locked TVT mode or fractional rate link mode this
signal may be driven but must be ignored by the
receiving device.
In Telecom Bus mode:
This signal identifies tributary payload frame boundaries
on the corresponding outgoing data bus. OV5[x] is set
high to mark the V5 bytes on the bus.
OV5[1] can be part of either a 19.44MHz SBI or
Telecom Bus when combined with OV5[4:2] or can be
used as part of a standalone 77.76MHz SBI336 or
Telecom Bus.
OV5[4:2] are held tri-state when configured for
77.76MHz operation.
When the SBS is held reset, OV5[4:1] is driven low.
OV5[4:1] is updated on the rising edge of SREFCLK.
JUST_REQ[4]
JUST_REQ[3]
JUST_REQ[2]
JUST_REQ[1]
Bidir
AC21
AA2
A4
Y2
Shared Bus Justification Request (JUST_REQ[4:1]).
The SBI Bus Justification Request signal,
JUST_REQ[x], is used to speed up, slow down or
maintain the minimal rate of a slave timed SBI device.
When the SBS is configured to be connected to a
physical layer device, JUST_REQ[4:1] is an input. In
SBI mode, JUST_REQ[4:1] is aligned to OC1FP[1] and
the Outgoing bus. In SBI336 mode, JUST_REQ[1] is
aligned to the IC1FP[1] and Incoming Bus.
When the SBS is configured to be connected to a link
layer device, JUST_REQ[4:1] is an output. In SBI
mode, JUST_REQ[4:1] is aligned to IC1FP[1] and the
Incoming bus. In SBI336 mode, JUST_REQ[1] is
aligned to OC1FP[1] and the Outgoing bus.
This active high signal, JUST_REQ[x], indicates
negative timing adjustments on the corresponding SBI
bus when asserted high during the V3 or H3 octet,
depending on the tributary type. In response to this the
slave timed SBI device should send an extra byte in the
V3 or H3 octet of the next frame along with a valid
payload signal indicating a negative justification.
This signal indicates positive timing adjustments on the
corresponding SBI bus when asserted high during the
octet following the V3 or H3 octet, depending on the
tributary type. The slave timed SBI device should
respond to this by not sending an octet during the V3 or
H3 octet of the next frame along with a valid payload
signal indicating a positive justification.
For fractional rate links this signal is asserted high
during any available information byte to indicate to the
slave timed SBI device that the timing master device is
able to accept another byte of data. For every byte that
this signal is asserted high the slave device is expected
to send a valid byte of data.
All timing adjustments from the slave timed device in
response to the justification request must still set the