SBI Bus Serializer ASSP Telecom Standard Product Data Sheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000168, Issue 5
83
10.16.1
Outgoing SBI336S Translation
This block translates the generic internal SBI format to the external SBI format. A control RAM
keeps the current configuration of the outgoing SBI bus(es) and the tributaries carried so that it
can perform the translation function.
Common to all tributaries is identification of the first C1 byte. There are unique mappings of the
8B/10B codes for the supported SBI bus link types: Asynchronous T1/E1, Synchronous (locked)
T1/E1, Transparent VT1.5/VT2, DS3/E3 and Fractional rate links. Much of the identification
and mapping of a link from serial SBI format is based on the OC1FP frame pulse and a
tributaries location relative to that C1 reference. In addition to the OC1FP identification this
block identifies multi-frame alignment, valid payload, pointer movements for floating
tributaries and timing control for decoding from the 8B/10B serial SBI format.
10.17 Outgoing SBI336 Timing Adapter
The Outgoing SBI336 Timing Adapter, OSTA, provides a demultiplexing from a 77.76MHz
SBI336 or Telecom bus to four outgoing 19.44MHz SBI or Telecom buses. The outgoing timing
adapter block also provides a transparent mode when the outgoing interface is already in
77.76MHz SBI336 or Telecom bus format.
When the SBS is connected to a 19.44MHz SBI link layer device the justification request
signal, JUST_REQ, is an output from the SBS and is aligned to the incoming bus. This block
re-aligns the internal justification request signal from the internal outgoing SBI336 frame
alignment to the incoming SBI frame alignment, marked by IC1FP. When the SBS is connected
to a 19.44Mhz SBI physical layer device or any 77.76MHz SBI336 device, no re-alignment of
the justification request is required by this block.
10.18 In-band Link Controller
In order to permit centralized control of distributed NSE/SBS fabrics from the NSE
microprocessor interface (for applications in which NSEs are located on fabric cards, and SBSs
are located on multiple line cards), an in-band signaling channel is provided between the NSE
and the SBS over the Serial interface. Each NSE can control up to 32 SBSs which are attached
by the LVDS links. The NSE-SBS in-band channel is full duplex, but the NSE has active
control of the link.
The SBS contains two independent In-Band Link Controllers. One ILC is connected to the
Working Transmit Serial LVDS Link and the other is connected to the Protection Transmit
Serial LVDS Link.
The in-band channel is carried in the first 36 columns of four rows of the SBI or Telecom bus
structure, rows 3, 6, 7 and 8. The overall in-band channel capacity is thus 36*4*64kb/s =
9.216Mb/s. Each 36 bytes per row allocated to the in-band signaling channel is its own in-band
message between the end points. Four bytes of each 36 byte in-band message are reserved for
end-to-end control information and error protection, leaving 8.192Mb/s available for user data
transfer between the end points.