參數資料
型號: DSP16210
英文描述: TVS 400W 6.5V UNIDIRECT SMA
中文描述: DSP16210數字信號處理器
文件頁數: 141/173頁
文件大?。?/td> 2621K
代理商: DSP16210
Data Sheet
July 2000
DSP16210 Digital Signal Processor
Lucent Technologies Inc.
DRAFT COPY
141
Timing Characteristics and Requirements
(continued)
DSP Clock Generation
Figure 28. I/O Clock Timing Diagram
Table 90. Timing Requirements for Input Clock
Abbreviated Reference
t1
t2
t3
Parameter
Min
20
10
10
Max
Unit
ns
ns
ns
Clock In Period (high to high)
Clock In Low Time (low to high)
Clock In High Time (high to low)
Device is fully static, t1 is tested at 100 ns input clock option, and memory hold time is tested at 0.1 s.
Table 91. Timing Characteristics for Input Clock and Output Clock
Abbreviated Reference
t4
t5
t6
t6a
Parameter
Min
T
0.74
Max
10
10
3.8
Unit
ns
ns
ns
μ
s
Clock Out High Delay (low to low)
Clock Out Low Delay (high to high)
Clock Out Period (high to high)
Clock Out Period with SLOWCLK Bit
Set in
powerc
Register (high to high)
T = internal clock period (CLK).
5-4009(F).d
t4
t6, t6a
t1
t2
CKI
V
I
H
V
I
L
V
O
H
V
O
L
t5
CKO
t3
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