參數(shù)資料
型號: DSP16210
英文描述: TVS 400W 6.5V UNIDIRECT SMA
中文描述: DSP16210數(shù)字信號處理器
文件頁數(shù): 62/173頁
文件大?。?/td> 2621K
代理商: DSP16210
Data Sheet
July 2000
DSP16210 Digital Signal Processor
62
DRAFT COPY
Lucent Technologies Inc.
Hardware Architecture
(continued)
Power Management
(continued)
Figure 21
illustrates the clocks to the core, the peripherals, and the CKO pin. See also
Figure 19 on page 57
.
Figure 21. Power Management and Clock Distribution
CORE
INTERRUPT
LOGIC
MIOU0
INT[3:0]
CLK
SYNC
GATE
PHIF16
SYNC
GATE
TIMER0
SYNC
GATE
MIOU1
SYNC
GATE
SYNC
GATE
SSIO
SYNC
GATE
TIMER1
SYNC
GATE
ESIO
SYNC
GATE
EIBF
MIBF0
MIBF1
TIME0
TIME1
MOBE0
MOBE1
EOBE
EIFE
EOFE
ECOL
MIOU0
(powerc[2])
PHIF16
(powerc[11])
TIMER0
(powerc[0])
MIOU1
(powerc[3])
SSIO
TIMER1
(powerc[1])
ESIO
AWAIT
(alf[15])
CLK
MUX
0
1
CKO
CKI
CKOSEL[2:0]
(ioc[7:5])
(powerc[12])
(powerc[4])
CLKE
(FROM CLOCK
DISABLE LOGIC)
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