Data Sheet
July 2000
DSP16210 Digital Signal Processor
64
DRAFT COPY
Lucent Technologies Inc.
Hardware Architecture
(continued)
Power Management
(continued)
Low-Power Standby Mode with Slow Internal Clock.
It is assumed that the PLL is disabled (PLLEN = 0) and the
processor is clocked with a high-speed clock on the CKI pin. Prior to entering low-power standby mode by setting
the AWAIT bit (
alf
[15]), the program reduces power by turning off all the peripherals, holding the CKO pin low, and
selecting the internal ring oscillator as the clock source.
Note:
The ring oscillator continues to run during standby mode so there is no wake-up latency.
powerc=0x1c1f
2*nop
ioc=0x0040
alf=0x8000
nop
nop
nop
...
powerc=0x0000
2*nop
ioc = 0x0000
/* Prepare for standby mode--turn off peripherals,
/* select slow clock, wait for it to take effect.
/* Hold CKO low.
/* Set AWAIT bit (stop core clock; interrupt logic
/* active.) nops needed for bedtime execution.
/* Reduced standby power consumed here.
/* Interrupt wakes up the core.
/* User code executes here.
/* Select high-speed clock and turn on peripherals. */
/* Wait for it to take effect.
/* CKO is free-running.
*/
*/
*/
*/
*/
*/
*/
*/
_standby:
_cont:
*/
*/
Software Stop with CKI Clock Input.
It is assumed that the PLL is disabled (PLLEN = 0) and the processor is
clocked with a high-speed clock on the CKI pin. Prior to performing a software stop by setting the NOCK bit (
pow-
erc
[9]), the program reduces power by turning off all the peripherals and holding the CKO pin low. Setting the
NOCK bit shuts off the internal clock and stops program execution until an interrupt on the INT0 pin restarts the
internal clock. (Alternatively, INT1 or RSTB can be used to restart the clock.)
powerc=0x189f
2*nop
di
inc0=NO_INT0
ei
ioc = 0x0040
powerc=0x1a9f
/* Prepare for software stop--set INT0EN, turn off
/* peripherals, and wait for it to take effect.
*/
*/
/* Disable the INT0 interrupt (Clear inc0[11:10]).
*/
/* Hold CKO low.
/* Set NOCK to stop internal clock.
/* Minimum switching power consumed here.
/* Some nops are needed.
/* INT0 pin clears the NOCK bit; clocking resumes.
/* User code executes here.
/* Clear INT0EN bit and turn on peripherals.
/* Wait for it to take effect.
/* Clear the INT0 status bit.
*/
*/
*/
*/
*/
*/
*/
*/
*/
_nock:
3*nop
cont:
...
powerc=0x0000
2*nop
ins 0x0020
di
inc0=INT0
ei
ioc=0x0000
/* Safe to reenable the INT0 interrupt.
*/
/* CKO is free-running.
*/