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參數(shù)資料
| 型號(hào)： | DSP16210 |
| 英文描述： | TVS 400W 6.5V UNIDIRECT SMA |
| 中文描述： | DSP16210數(shù)字信號(hào)處理器 |
| 文件頁(yè)數(shù)： | 59/173頁(yè) |
| 文件大?。?/td> | 2621K |
| 代理商： | DSP16210 |
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Data Sheet
July 2000
DSP16210 Digital Signal Processor
Lucent Technologies Inc.
DRAFT COPY
59
Hardware Architecture
(continued)
Clock Synthesis
(continued)
Phase-Lock Loop (PLL) Programming Restrictions
Figure 20. Allowable States and State Changes of pllc Register Fields
There are restrictions on the allowable states of the
PLLEN and PLLSEL fields (
pllc
[15:14]), and on the
allowable changes to these fields and the remaining
fields of
pllc
. Figure 20 illustrates these restrictions,
summarized below:
I
Do not select the PLL if it is not enabled (PLLEN = 0
and PLLSEL = 1 is not allowed).
I
Do not enable and select the PLL in one step (do not
change both PLLEN from 0 to 1 and PLLSEL from 0
to 1 within a single instruction write to
pllc
). Instead,
perform the following steps:
1. Enable the PLL without selecting it, i.e., write
pllc
such that PLLEN = 1, PLLSEL = 0, and
pllc
[13:0]
(Mbits[4:0], Nbits[2:0], etc.) are programmed
appropriately.
2. Wait until the LOCK flag is set.
3. Select the PLL as the clock source, i.e., write
pllc
such that PLLEN = 1, PLLSEL = 1, and
pllc
[13:0]
are programmed to the same values as in step 1.
I
Do not change
pllc
[13:0] (Mbits[4:0], Nbits[2:0], etc.)
while the PLL is selected (PLLSEL = 1) or while
deselecting the PLL (writing
pllc
such that PLLSEL
changes from 1 to 0). To change
pllc
[13:0] if the PLL
is selected:
1. Deselect the PLL, keep it enabled, and don’t
change
pllc
[13:0], i.e., write
pllc
such that
PLLEN = 1, PLLSEL = 0, and
pllc
[13:0] are at
their old values.
2. Program
pllc
[13:0] to the new values.
3. Wait until the LOCK flag is set.
4. Select the PLL as the clock source, i.e., write
pllc
such that PLLEN = 1, PLLSEL = 1, and
pllc
[13:0]
are programmed to the same values as in step 2.
I
The PLL can be deselected and powered down in the
same instruction, i.e., both PLLEN and PLLSEL can
be cleared in a single write to
pllc
, but
pllc
[13:0] can-
not be changed in that same instruction (must be
written with their old values).
I
As long as
pllc
[13:0] remains unchanged and the
PLL remains enabled (PLLEN = 1), the programmer
can deselect the reselect the PLL (change PLLSEL
from 1 to 0 and back again) without checking the
LOCK flag status.
PLLEN
0
PLLSEL
0
PLL TURNED OFF
PLL DESELECTED
PLLEN
1
PLLSEL
0
PLL TURNED ON
PLL DESELECTED
PLLEN
1
PLLSEL
1
PLL TURNED ON
PLL SELECTED
LOCK FLAG
MUST BE SET
CANNOT CHANGE
(
pllc
[13:0])
CANNOT CHANGE
(
pllc
[13:0])
CANNOT CHANGE
(
pllc
[13:0])
CANNOT CHANGE
(
pllc
[13:0])
PROGRAM (
pllc
[13:0])
AS REQUIRED
CAN CHANGE
(
pllc
[13:0])
CAN CHANGE
(
pllc
[13:0])
CAN CHANGE
(
pllc
[13:0])
PLLEN
0
PLLSEL
1
PLL TURNED OFF
PLL SELECTED
NOT ALLOWED
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