Preliminary Data Sheet
May 2001
TMXF28155/51 Super Mapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
107
Agere Systems Inc.
8 TMUX Registers
(continued)
Table 108. TMUX_THS_POH[1
—
3]_CTL, Transmit High-Speed Control Parameters (R/W)
(continued)
Address
Bit
Name
Function
Reset
Default
0
0x40037
3
TMUX_THSF2INS2
Transmit F2 Insert (Control) for Port 2.
Control bit, when set
to a logic 1, inserts the value in TMUX_TF2INS2[7:0]
(
Table 114
)
into the outgoing F2 byte in the STS-3/STM-1
(AU-4) frame; a logic 0 allows insertion from the TPOAC chan-
nel or a default value. Only port 1 control is valid in AU-4
mode.
TMUX_THSRDIPINS2
Transmit Path RDI Insert (Control) for Port 2.
Control bit,
when set to a logic 1, inserts the value in
TMUX_TRDIPINS2[2:0] (
Table 114
) into the outgoing G1[3:1]
bits in the STS-3/STM-1 (AU-4) frame; a logic 0 allows inser-
tion from the TPOAC channel or a default value. Only port 1
control is valid in AU-4 mode.
TMUX_THSC2INS2
Transmit C2 Insert (Control) for Port 2.
Control bit, when
set to a logic 1, inserts the value in TMUX_TC2INS2[7:0]
(
Table 114
)
into the outgoing C2 byte in the STS-3/STM-1
(AU-4) frame; a logic 0 allows insertion from the TPOAC chan-
nel or a default value. Only port 1 control is valid in AU-4
mode.
TMUX_THSJ1INS2
Transmit J1 Insert (Control) for Port 2.
Control bit, when set
to a logic 1, inserts the 64-byte sequence
TMUX_TJ1DINS2[64
—
1][7:0] (
Table 141
) into the outgoing
STS-3/STM-1 (AU-4) frame; a logic 0 allows insertion from the
TPOAC channel or a default value. Only port 1 control is valid
in AU-4 mode.
—
Reserved.
TMUX_THSPREIINH3
Transmit Path REI Inhibit for Port 3.
Control bit, when set to
a logic 1, disables hardware insertion of path REI (B3 errors)
in the outgoing STS-3/STM-1 (AU-4) frame G1 byte; a logic 0
enables hardware insertion of path REI. Only port 1 control is
valid in AU-4 mode.
TMUX_TPOHTHRU3
Transmit High-speed Path Overhead Insertion from Low-
speed Input (Telecom Bus).
Control bit, when set to a logic
1, causes all path overhead bytes for port 3, and H1, H2, and
H3, to be passed through from the low-speed telecom bus to
the high-speed output signal. Only port 1 control is valid in
AU-4 mode.
TMUX_THSN1INS3
Transmit N1 Insert (Control) for Port 3.
Control bit, when
set to a logic 1, inserts the value in TMUX_TN1INS3[7:0]
(
Table 114
) into the outgoing N1 byte in the STS-3/STM-1
(AU-4) frame; a logic 0 allows insertion from the TPOAC chan-
nel or a default value. Only port 1 control is valid in
AU-4 mode.
TMUX_THSK3INS3
Transmit K3 Insert (Control) for Port 3.
Control bit, when
set to a logic 1, inserts the value in TMUX_TK3INS3[7:0]
(
Table 114
) into the outgoing K3 byte in the STS-3/STM-1
(AU-4) frame; a logic 0 allows insertion from the TPOAC chan-
nel or a default value. Only port 1 control is valid in
AU-4 mode.
2
0
1
0
0
0
0x40038
15:9
8
0x00
0
7
0
6
0
5
0