TMXF28155 Super Mapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Preliminary Data Sheet
May 2001
320
Agere Systems Inc.
12 28-Channel Framer Registers
(continued)
Table 447. Framer Register Map
(continued)
Address
Symbol
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Arbiter Link Registers
—
R/W
See Table 417 for Values of L and T in the Register Address Field
FRM_
ICKEDGE
0x8LPF0
FRM_ARLR1
FRM_
LNK_ENA
FRM_LNK_
TRANSP
FRM_LNK_
RESTARTN
FRM_LNK_
REFRAME
0x8LPF1
FRM_ARLR2
FRM_ESF_
CRC_EN
FRM_FAST
FRM_OPT[1:0]
FRM_FBE_
MODE
FRM_LF_CRT[2:0]
FRM_AUTO
_AIS
FRM_RAIL3_DEC[1:0]
FRM_MODE[3:0]
0x8LPF2
FRM_ARLR3
FRM_TP_C
K_SRC_EN
FRM_TP_
CK_SRC
FRM_TP_
DD_SRC
Frame Formatter Link Registers
—
R/W
See Table 417 for Values of L and T in the Register Address Field
FRM_
ESFRAMD
FRM_
TXLLBOFF
0x8LPF4
FRM_FFLR1
FRM_ZCSMD[2:0]
FRM_
OCKEDGE
FRM_
AUTOPLB
FRM_
TXRAICI
FRM_
AUTOLLB
FRM_
TXRAI
FRM_
AUTOEBIT
FRM_
TXAISCI
FRM_
AUTORAI
FRM_
TXAIS
0x8LPF5
FRM_FFLR2
FRM_TXLBMD[1:0]
FRM_
TXLLBON
FRM_TXIID
FRM_
TXAUXP
Line Decoder/Encoder Link Registers
—
R/W
See Table 427 and Tabl e429 for Values of L and T in the Register Address Field
0x8TPFC
FRM_LDLR1
FRM_
EXCZERO
FRM_RLCL
K_EDGE
FRM_LD_MODE[2:0]
0x8LPFD
FRM_LDLR2
FRM_TLCL
K_EDGE
FRM_LE_MODE[2:0]
HDLC Channel Registers
—
R/W
See Table 432 for Mapping of H and P in the Register Address Field
Transmit HDLC Channel Registers
FRM_TTIMESLOT[4:0]
0x8HP80
FRM_HCR1
FRM_TBIT_IM[7:0]
0x8HP81
FRM_HCR2
FRM_TFRAME_SEL[1:0]
FRM_TLINK[4:0]
0x8HP82
FRM_HCR3
FRM_THC_
RESET
0
FRM_
TENABL
FRM_CFLAGS[1:0]
FRM_
PRMEN
FRM_
TLOOP
FRM_C_R
FRM_
HTTHRSEL
FRM_IFCS
FRM_
HTIDLE
FRM_
HTMODE
FRM_
HTUND
FRM_
MHTUND
FRM_HXPIDLE[1:0]
0x8HP83
FRM_HCR4
(RO)
FRM_HCR5
0
0
0
0
0
0
0
0
0
0
0
0
FRM_
HTDONE
FRM_
MHTDONE
FRM_
HTTHRSH
FRM_MHT
THRSH
0x8HP84
0x8HP85
FRM_HCR6
(WO)
FRM_HTFUNC[1:0]
FRM_HTDATA[7:0]
0x8HP86
FRM_HCR7
FRM_HTCOUNT[9:0]
Receive HDLC Channel Registers
FRM_RTIMESLOT[4:0]
0x8HP00
FRM_HCR8
FRM_RBIT_IM[7:0]
0x8HP01
FRM_HCR9
FRM_RFRAME_SEL[1:0]
FRM_RLINK[4:0]
0x8HP02
FRM_HCR10
FRM_RHC_
RESET
0
FRM_
RENABL
FRM_
RTHRSEL
FRM_RFCS
FRM_
HRMODE
FRM_
BYTAL
FRM_MATCH[7:0]
0x8HP03
FRM_HCR11
(RO)
FRM_HCR12
0
0
0
0
0
0
0
0
0
0
0
FRM_
RIDLE
FRM_
MIDLE
FRM_OVR
FRM_EOP
FRM_
HRTHRSH
FRM_MHR
THRSH
0x8HP04
FRM_
MOVR
FRM_
MEOP
0x8HP05
FRM_HCR13
(RO)
0
0
0
0
0
FRM_HMDA
FRM_
HRVALID
FRM_
HRTYPE
FRM_HR_DATA[7:0]
FRM_HOVR FRM_HEOP
FRM_
HCRCERR
FRM_
HABRT
FRM_HIDL
FRM_HBIT[2:0]
0x8HP06
FRM_HCR14
(COR)
FRM_HRCOUNT[9:0]