TMXF28155/51 Super Mapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Preliminary Data Sheet
May 2001
322
Agere Systems Inc.
13 Cross Connect (XC) Registers
(continued)
13.1 Cross Connect Register Descriptions
Table 448. XC_ID_R, XC Global Register 1 (RO)
Table 449. XC_CHI_MODE1_R, XC System Interface Global Register 1 (R/W)
Table 450. XC_CHI_MODE2_R, XC System Interface Global Register 2 (R/W)
DS1/E1 crosspoint connectivity is determined by a set of source identifiers (SOURCE_IDs), one for each channel
leaving the crosspoint switch. A DS1/E1 SOURCE_ID is therefore defined as follows:
Address
Bit
Name
Function
Reset
Default
0x0005
0x50000
15:11
10:8
7:0
—
Reserved
.
Version.
These bits identify the version number of the XC.
XC_ID.
XC_ID register returns a fixed value (0x05) when
read.
XC_VERSION[2:0]
XC_ID[7:0]
Address
Bit
Name
Function
Reset
Default
0x0000
0x5000E
15:3
2
1
—
—
Reserved
.
Reserved.
Must write to 0.
XC_SYNC_FOR_DATA
Sync For Data.
This bit should set to 1 if the transmit sys-
tem interface is in use (CHI, PSB, and NSMI). Setting this
bit allows the external I/O pins LINETXSYNC[29
—
1] to
output transmit system data. Otherwise, set to 0.
XC_SI_CHI
PSB/CHI.
This bit should be set to 1 if the transmit system
interface is in PSB mode; otherwise, 0 in CHI mode.
0
Address
Bit
Name
Function
Reset
Default
0x0000
0x5000F
15:14
13:0
—
Reserved.
CHI Mode.
The 28 transmit system links are broken down
into seven groups of four. Each group is controlled by two
bits XC_CHI_MODE[1
—
7][1:0]. XC_CHI_MODE[1
—
7][1:0]
controls the group of links 4i
–
3, 4i
–
2, 4i
–
1, and 4i, where
i = 1 to 7. The definition of CHI_MODE[1
—
7][1:0] is as fol-
lows:
XC_CHI_MODE
[1
—
7][1:0]
00 = All four links within the group are normal outputs at
2 Mbits/s or 4 Mbits/s.
01 = Links 4i
–
3 and 4i
–
2 are normal outputs; links 4i
–
1
and 4i are combined into a single output on 4i; and out-
put 4i
–
1 is used as T1/E1 line output.
10 = Links 4i
–
1 and 4i are combined into a single output on
4i; links 4i
–
3 and 4i
–
2 are combined into a single out-
put on 4i
–
2; and outputs 4i
–
1 and 4i
–
3 are used as
T1/E1 line outputs.
11 = All four links are combined into a single output on 4i;
and the other three outputs are used as T1/E1 line out-
puts.
Bit
7
6
5
4
3
2
1
0
SOURCE_ID
SOURCE_BLOCK[2:0]
CHANNEL_ID[4:0]