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Agere Systems Inc.
TMXF28155 Super Mapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Preliminary Data Sheet
May 2001
Table of Contents
By Major Sections
Contents
Page
Features ...................................................................................................................................................................1
Product Description ..................................................................................................................................................5
Preface ...................................................................................................................................................................5
Interface Specifications ............................................................................................................................................8
Pin Information .......................................................................................................................................................8
Electrical Characteristics ......................................................................................................................................33
Timing Characteristics .........................................................................................................................................37
Ordering Information ............................................................................................................................................61
Register Description ...............................................................................................................................................62
Microprocessor Interface and Global Control and Status Registers ....................................................................62
TMUX Registers ...................................................................................................................................................75
SPE Mapper Registers ......................................................................................................................................133
VT/TU Mapper Registers ...................................................................................................................................153
M13/M23 MUX/DeMUX Registers .....................................................................................................................196
28-Channel Framer Registers ............................................................................................................................239
Cross Connect (XC) Registers ...........................................................................................................................321
Digital Jitter Attenuation Controller Registers ....................................................................................................331
Test-Pattern Generation/Detection Registers .....................................................................................................336
Functional Descriptions ........................................................................................................................................354
Microprocessor Interface Functional Description ...............................................................................................354
TMUX Functional Description ............................................................................................................................359
SPE Mapper Functional Description ..................................................................................................................396
VT/TU Mapper Functional Description ...............................................................................................................425
M13/M23 MUX/DeMUX Block Functional Description .......................................................................................455
28-Channel Framer Block Functional Description ..............................................................................................475
Cross Connect (XC) Block Functional Description ............................................................................................542
Digital Jitter Attenuation Controller Functional Description ................................................................................570
Test-Pattern Generation/Detection Functional Description ................................................................................574
Philosophies .......................................................................................................................................................582
Applications ..........................................................................................................................................................588
Change History ..................................................................................................................................................604