Preliminary Data Sheet
May 2001
TMXF28155/51 Super Mapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
241
Agere Systems Inc.
12 28-Channel Framer Registers
(continued)
Table of Contents
(continued)
Tables
Page
Table 374. FRM_RSLR33, Receive Signaling Link Register 33 (R/W) ............................................................... 269
Table 375. Transmit Path Signaling Register Addressing Map ........................................................................... 270
Table 376. Transmit Path Signaling Registers Address Indexing ....................................................................... 270
Table 377. FRM_TSLR0
—
FRM_TSLR31, Transmit Signaling Link Registers 0
—
31 (R/W) .............................. 271
Table 378. FRM_TSLR32, Transmit Signaling Link Register 32 (R/W) .............................................................. 272
Table 379. FRM_TSLR33, Transmit Signaling Link Register 33 (COR) ............................................................. 273
Table 380. Performance Monitor Per Link Register Addressing Map ................................................................. 273
Table 381. Performance Monitor Per Link Register Address Indexing ................................................................ 274
Table 382. FRM_PMLR1, Performance Monitor Link Register 1 (R/W) .............................................................. 274
Table 383. FRM_PMLR2, Performance Monitor Link Register 2 (R/W) .............................................................. 274
Table 384. FRM_PMLR3, Performance Monitor Link Register 3 (R/W) .............................................................. 275
Table 385. FRM_PMLR4, Performance Monitor Link Register 4 (COR) ............................................................. 275
Table 386. FRM_PMLR5, Performance Monitor Link Register 5 (COR) ............................................................. 282
Table 387. FRM_PMLR6, Performance Monitor Link Register 6 (COR) ............................................................. 284
Table 388. FRM_PMLR7, Performance Monitor Link Register 7 (COR) ............................................................. 284
Table 389. FRM_PMLR8, Performance Monitor Link Register 8 (COR) ............................................................. 285
Table 390. FRM_PMLR9, Performance Monitor Link Register 9 (COR) ............................................................. 285
Table 391. FRM_PMLR10, Performance Monitor Link Register 10 (COR) ......................................................... 285
Table 392. FRM_PMLR11, Performance Monitor Link Register 11 (COR) ......................................................... 285
Table 393. FRM_PMLR12, Performance Monitor Link Register 12 (COR) ......................................................... 285
Table 394. FRM_PMLR13, Performance Monitor Link Register 13 (COR) ......................................................... 286
Table 395. FRM_PMLR14, Performance Monitor Link Register 14 (COR). ........................................................ 287
Table 396. FRM_PMLR15, Performance Monitor Link Register 15 (COR) ......................................................... 287
Table 397. FRM_PMLR16, Performance Monitor Link Register 16 (COR) ......................................................... 287
Table 398. FRM_PMLR17, Performance Monitor Link Register 17 (COR) ......................................................... 287
Table 399. FRM_PMLR18, Performance Monitor Link Register 18 (COR) ......................................................... 287
Table 400. FRM_PMLR19, Performance Monitor Link Register 19 (COR) ......................................................... 288
Table 401. FRM_PMLR20, Performance Monitor Link Register 20 (COR) ......................................................... 288
Table 402. Receive Facility Data Link Register Addressing Map ........................................................................ 288
Table 403. Receive Path Facility Data Link Registers Address Indexing ............................................................ 289
Table 404. FRM_RFDLLR1
—
FRM_RFDLLR5, Receive FDL Link Registers 1
—
5 (RO) ................................... 289
Table 405. FRM_RFDLLR6, Receive FDL Link Register 6 (R/W) ....................................................................... 289
Table 406. FRM_RFDLLR7, Receive FDL Link Register 7 (RO) ........................................................................ 289
Table 407. FRM_RFDLLR8, Receive FDL Link Register 8 (COR) ...................................................................... 290
Table 408. FRM_RFDLLR9, Receive FDL Link Register 9 (R/W) ....................................................................... 290
Table 409. Transmit Facility Data Link Register Addressing Map ....................................................................... 290
Table 410. Transmit Path Facility Data Link Registers Address Indexing ........................................................... 290
Table 411. FRM_TFDLLR1
—
FRM_TFDLR5, Transmit FDL Link Registers 1
—
5 (COR) ................................... 290
Table 412. FRM_TFDLLR6, Transmit FDL Link Register 6 (R/W) ...................................................................... 291
Table 413. FRM_TFDLLR7, Transmit FDL Link Register 7 (R/W) ...................................................................... 291
Table 414. FRM_TFDLLR8, Transmit FDL Link Register 8 (RO/COW) .............................................................. 292
Table 415. FRM_TFDLLR9, Transmit FDL Link Register 9 (R/W) ...................................................................... 292
Table 416. System Interface, Arbiter, and Frame Formatter Link Register Addressing Map .............................. 292
Table 417. System Interface, Arbiter, and Frame Formatter Link Register Address Indexing ............................ 293
Table 418. FRM_SYSLR1, System Interface Link Register 1 (R/W) ................................................................... 293
Table 419. FRM_SYSLR2, System Interface Link Register 2 (R/W) ................................................................... 294
Table 420. FRM_SYSLR3
—
FRM_SYSLR6, System Interface Link Registers 3
—
6 (R/W) ................................ 294
Table 421. FRM_ARLR1, Arbiter Link Register 1 (R/W) ..................................................................................... 295
Table 422. FRM_ARLR2, Arbiter Link Register 2 (R/W) ..................................................................................... 296