參數(shù)資料
型號(hào)： Am79C965A
廠商： Advanced Micro Devices, Inc.
英文描述： PCnet?-32 Single-Chip 32-Bit Ethernet Controller
中文描述： PCnet？-32單芯片32位以太網(wǎng)控制器
文件頁(yè)數(shù)： 117/228頁(yè)
文件大?。?/td> 1681K
代理商： AM79C965A
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Am79C965A
117
Figure 34. Programming System Logic Through the PCnet-32 EEPROM Read Operation
SHFBUSY will be HIGH for the entire EEPROM read
operation, and therefore all EEPROM contents will
have been shifted through the external logic before it
settles on its final, programmed value. If the EEPROM
checksum verification fails, then the EEPROM contents
are assumed to be invalid, and the SHFBUSY signal
will remain HIGH after the completion of the EEPROM
read operation. This action will prevent incorrect
system logic values from being driven into the system.
If the EEPROM checksum verification passes, then the
EEPROM contents are assumed to be valid, and the
SHFBUSY signal will return to a LOW state after the
completion of the EEPROM read operation.
Transmit Operation
The transmit operation and features of the PCnet-32
controller are controlled by programmable options.
Transmit Function Programming
Automatic transmit features such as retry on collision,
FCS generation/transmission, and pad field insertion
can all be programmed to provide flexibility in the (re-)
transmission of messages.
Disable retry on collision (DRTY) is controlled by the
DRTY bit of the Mode register (CSR15) in the initializa-
tion block.
Automatic pad field insertion is controlled by the
APAD_XMT bit in CSR4. If APAD_XMT is set, auto-
matic pad field insertion is enabled, the DXMTFCS fea-
ture is over-ridden, and the 4 byte FCS will be added to
the transmitted frame unconditionally. If APAD_XMT is
clear, no pad field insertion will take place and runt
packet transmission is possible.
The disable FCS generation/transmission feature can
be programmed dynamically on a frame by frame
basis. See the ADD_FCS description of TMD1.
Transmit FIFO Watermark (XMTFW in CSR80) sets the
point at which the BMU requests more data from the
transmit buffers for the FIFO. A minimum of
“
XMTFW
”
empty spaces must be available in the transmit FIFO
before the BMU will request the system bus in order to
transfer transmit packet data into the transmit FIFO.
Transmit Start Point (XMTSP in CSR80) sets the point
when the transmitter actually attempts to transmit a
frame onto the media. A minimum of
“
XMTSP
”
bytes
must be written to the transmit FIFO for the current
frame before transmission of the current frame will be-
gin. (When automatically padded packets are being
sent, it is conceivable that the XMTSP is not reached
when all of the data has been transferred to the FIFO.
In this case, the transmission will begin when all of the
packet data has been placed into the transmit FIFO.)
When the entire frame is in the FIFO, attempts at trans-
mission of preamble will commence regardless of the
RESET
OUT1
OUT2
OUT3
FFR
FFR
FFR
R
D
EN
CK
Q
...up to 16 bits
PCnet-32
Controller
EEDI
RESET
EEDO
EECS
EESK
SHFBUSY
EEPROM
(93LC46)
EEDI
RESET
EEDO
EECS
EESK
R
D
EN
CK
Q
R
D
EN
CK
Q
18219-41
相關(guān)PDF資料
PDF描述
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AM79C970AKC PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C965AWW WAF 制造商:Advanced Micro Devices 功能描述:
AM79C970 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
AM79C970A 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
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