參數(shù)資料
型號(hào)： Am79C965A
廠商： Advanced Micro Devices, Inc.
英文描述： PCnet?-32 Single-Chip 32-Bit Ethernet Controller
中文描述： PCnet？-32單芯片32位以太網(wǎng)控制器
文件頁(yè)數(shù)： 124/228頁(yè)
文件大小： 1681K
代理商： AM79C965A
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124
Am79C965A
USER ACCESSIBLE REGISTERS
The PCnet-32 controller implements all PCnet-ISA
(Am79C960) registers, all LANCE (Am7990) registers,
all ILACC (Am79C900) registers, plus a number of
additional registers. The PCnet-32 controller registers
are compatible with both the PCnet-ISA (Am79C960)
registers and all of the LANCE (Am7990) registers
upon power up. Compatibility to the ILACC set of
registers requires one access to the Software Style
register (BCR20, bits 7
–
0) to be performed. By setting
an appropriate value of the Software Style register
(BCR20, bits 7
–
0) the user can select a set of registers
that are compatible with the ILACC set of registers.
Note that all register locations are defined to be 16 bits
in width when WIO mode is selected. When DWIO
mode is selected, all register locations are defined to
be 32 bits in width. When performing register write
operations in DWIO mode, the upper 16 bits should
always be written as zeros, except APROM locations.
When performing register read operations in DWIO
mode, the upper 16 bits of I/O resources should always
be written as ZEROs, except for APROM locations and
CSR88. When performing register read operations in
DWIO mode, the upper 16 bits of I/O resources should
always be regarded as having undefined values,
except for the APROM locations and CSR88.
PCnet-32 controller registers can be divided into three
groups:
Setup registers:
Registers that are intended to be
initialized by the system initialization procedure (e.g.
BIOS device initialization routine) or by the device
driver to program the operation of various PCnet-32
controller features
Running registers
: Registers that are intended to be
used by the device driver software once the PCnet-32
controller is running to access status information and to
pass control information
Test registers
: Registers that are intended to be used
only for testing and diagnostic purposes
Below is a list of the registers that fall into each of the
first two categories. Those registers that are not
included in either of these lists can be assumed to be
intended for diagnostic purposes.
Setup Registers
The following is a list of those registers that would typi-
cally need to be programmed once during the setup of
the PCnet-32 controller within a system. The control
bits in each of these registers typically do not need to
be modified once they have been written. However,
there are no restrictions as to how many times these
registers may actually be accessed. Note that if the
default power up values of any of these registers is
acceptable to the application, then such registers need
never be accessed at all. Also note that some of these
registers may be programmable through the EEPROM
read operation, and therefore do not necessarily need
to be written to by the system initialization procedure or
by the driver software.
CRS1
Initialization Address[15:0]
CSR2
Initialization Address[31:16]
CSR3
Interrupt Masks and Deferral Control
CSR4
Test and Features Control
CSR8
Logical Address Filter [15:0]
CSR9
Logical Address Filter [31:16]
CSR10
Logical Address Filter [47:32]
CSR11
Logical Address Filter [63:48]
CSR12
Physical Address Filter [15:0]
CSR13
Physical Address Filter [31:16]
CSR14
Physical Address Filter [47:32]
CSR15
Mode Register
CSR24
Base Address of Receive Ring Lower
CSR25
Base Address of Receive Ring Upper
CSR30
Base Address of Transmit Ring Lower
CRS31
Base Address of Transmit Ring Upper
CSR47
Polling Interval
CSR58
Software Style
CSR76
Receive Ring Length
CSR78
Transmit Ring Length
CSR80
Cycle Register and
FIFO Threshold Control
CSR82
Bus Activity Timer
CSR100
Memory Error Time-out Register
CSR122
Receiver Packet Alignment Control
BCR2
MAU configuration
BCR16
I/O Base Address Lower
BCR17
I/O Base Address Upper
BCR18
Bus Size and Burst Control Register
BCR19
EEPROM Control and Status Register
BCR20
Software Style
BCR21
Interrupt Control
Running Registers
The following is a list of those registers that would typi-
cally need to be periodically read and perhaps written
during the normal running operation of the PCnet-32
相關(guān)PDF資料
PDF描述
AM79C970AKCW PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970A PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AVCW PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970 PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C965AWW WAF 制造商:Advanced Micro Devices 功能描述:
AM79C970 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
AM79C970A 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
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